Datasheet

 2015 Microchip Technology Inc. Preliminary DS60001320B-page 151
PIC32MZ Embedded Connectivity with Floating Point Unit (EF) Family
bit 12-10 IP1<2:0>: Interrupt Priority bits
111 = Interrupt priority is 7
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•
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010 = Interrupt priority is 2
001 = Interrupt priority is 1
000 = Interrupt is disabled
bit 9-8 IS1<1:0>: Interrupt Subpriority bits
11 = Interrupt subpriority is 3
10 = Interrupt subpriority is 2
01 = Interrupt subpriority is 1
00 = Interrupt subpriority is 0
bit 7-5 Unimplemented: Read as ‘0’
bit 4-2 IP0<2:0>: Interrupt Priority bits
111 = Interrupt priority is 7
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•
•
010 = Interrupt priority is 2
001 = Interrupt priority is 1
000 = Interrupt is disabled
bit 1-0 IS0<1:0>: Interrupt Subpriority bits
11 = Interrupt subpriority is 3
10 = Interrupt subpriority is 2
01 = Interrupt subpriority is 1
00 = Interrupt subpriority is 0
REGISTER 7-7: IPCx: INTERRUPT PRIORITY CONTROL REGISTER (CONTINUED)
Note: This register represents a generic definition of the IPCx register. Refer to Table 7-2 for the exact bit
definitions.