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ManualsBrandsMicrochip ManualsEmbedded Processors & ControllersMicrocontroller 32 Bit TQFP-64
101102103104105106107108109110
PIC32MZ Embedded Connectivity with Floating Point Unit (EF) Family
DS60001320B-page 102 Preliminary 2015 Microchip Technology Inc.
bit 6 BFSWAP: Boot Flash Bank Alias Swap Control bit
This bit is only writable when WREN = 0 and the unlock sequence has been performed.
1 = Boot Flash Bank 2 is mapped to the lower boot alias and boot Flash Bank 1 is mapped to the upper boot
alias
0 = Boot Flash Bank 1 is mapped to the lower boot alias and boot Flash Bank 2 is mapped to the upper boot
alias
bit 5-4 Unimplemented: Read as ‘0’
bit 3-0 NVMOP<3:0>: NVM Operation bits
These bits are only writable when WREN = 0.
1111 = Reserved
•
•
•
1000 = Reserved
0111 = Program erase operation: erase all of program Flash memory (all pages must be unprotected,
PWP<23:0> = 0x000000)
0110 = Upper program Flash memory erase operation: erases only the upper mapped region of program
Flash (all pages in that region must be unprotected)
0101 = Lower program Flash memory erase operation: erases only the lower mapped region of program
Flash (all pages in that region must be unprotected)
0100 = Page erase operation: erases page selected by NVMADDR, if it is not write-protected
0011 = Row program operation: programs row selected by NVMADDR, if it is not write-protected
0010 = Quad Word (128-bit) program operation: programs the 128-bit Flash word selected by NVMADDR,
if it is not write-protected
0001 = Word program operation: programs word selected by NVMADDR, if it is not write-protected
(2)
0000 = No operation
REGISTER 5-1: NVMCON: FLASH PROGRAMMING CONTROL REGISTER (CONTINUED)
Note 1: These bits are only reset by a Power-on Reset (POR) and are not affected by other reset sources.
2: This operation results in a “no operation” (NOP) when the Dynamic Flash ECC Configuration bits = 00
(FECCCON<1:0> (DVCFG0<9:8>)), which enables ECC at all times. For all other FECCCON<1:0> bit
settings, this command will execute, but will not write the ECC bits for the word and can cause DED errors
if dynamic Flash ECC is enabled (FECCCON<1:0> = 01). Refer to Section 52. “Flash Program Memory
with Support for Live Update” (DS60001193) for information regarding ECC and Flash programming.