Datasheet

PIC32MX5XX/6XX/7XX
DS61156D-page 114 © 2010 Microchip Technology Inc.
IC4E – Input Capture 5 Error 65 21 IFS2<1> IEC2<1> IPC5<12:10> IPC5<9:8>
PMPE – Parallel Master Port Error 66 28 IFS2<2> IEC2<2> IPC7<4:2> IPC7<1:0>
U1BE – UART1B Error 67 49 IFS2<3> IEC2<3> IPC12<12:10> IPC12<9:8>
U1BRX – UART1B Receiver 68 49 IFS2<4> IEC2<4> IPC12<12:10> IPC12<9:8>
U1BTX – UART1B Transmitter 69 49 IFS2<5> IEC2<5> IPC12<12:10> IPC12<9:8>
U2BE – UART2B Error 70 50 IFS2<6> IEC2<6> IPC12<20:18> IPC12<17:16>
U2BRX – UART2B Receiver 71 50 IFS2<7> IEC2<7> IPC12<20:18> IPC12<17:16>
U2BTX – UART2B Transmitter 72 50 IFS2<8> IEC2<8> IPC12<20:18> IPC12<17:16>
U3BE – UART3B Error 73 51 IFS2<9> IEC2<9> IPC12<28:26> IPC12<25:24>
U3BRX – UART3B Receiver 74 51 IFS2<10> IEC2<10> IPC12<28:26> IPC12<25:24>
U3BTX – UART3B Transmitter 75 51 IFS2<11> IEC2<11> IPC12<28:26> IPC12<25:24>
(Reserved) — — — — — —
Lowest Natural Order Priority
TABLE 7-1: INTERRUPT IRQ, VECTOR AND BIT LOCATION (CONTINUED)
Interrupt Source
(1)
IRQ
Vector
Number
Interrupt Bit Location
Flag Enable Priority Sub-Priority
Note 1: Not all interrupt sources are available on all devices. See Table 1, Table 2 and Table 3 for the list of
available peripherals.