Datasheet

 2011-2017 Microchip Technology Inc. DS30009995E-page 285
PIC24FV32KA304 FAMILY
FIGURE 29-13: I
2
C BUS DATA TIMING CHARACTERISTICS (MASTER MODE)
TABLE 29-32: I
2
C BUS DATA TIMING REQUIREMENTS (MASTER MODE)
AC CHARACTERISTICS
Standard Operating Conditions: 2.0V to 3.6V
(unless otherwise stated)
Operating temperature -40°C  T A  +85°C for Industrial
-40°C  T
A  +125°C for Extended
Param
No.
Symbol Characteristic Min
(1)
Max Units Conditions
IM10 T LO : SCL Clock Low Time 100 kHz mode T CY /2 (BRG + 1) — s
400 kHz mode T CY /2 (BRG + 1) — s
1 MHz mode
(2)
T CY /2 (BRG + 1) — s
IM11 T HI : SCL Clock High Time 100 kHz mode T CY /2 (BRG + 1) — s
400 kHz mode T CY /2 (BRG + 1) — s
1 MHz mode
(2)
T CY /2 (BRG + 1) — s
IM20 T F : SCL SDAx and SCLx
Fall Time
100 kHz mode — 300 ns C B is specified to be
from 10 to 400 pF
400 kHz mode 20 + 0.1 C B 300 ns
1 MHz mode
(2)
—100ns
IM21 T R : SCL SDAx and SCLx
Rise Time
100 kHz mode — 1000 ns C B is specified to be
from 10 to 400 pF
400 kHz mode 20 + 0.1 C B 300 ns
1 MHz mode
(2)
—300ns
IM25 T SU : DAT Data Input
Setup Time
100 kHz mode 250 — ns
400 kHz mode 100 — ns
1 MHz mode
(2)
100 — ns
IM26 T
HD : DAT Data Input
Hold Time
100 kHz mode 0 — ns
400 kHz mode 0 0.9 s
1 MHz mode
(2)
0—ns
IM40 T
AA : SCL Output Valid
from Clock
100 kHz mode — 3500 ns
400 kHz mode — 1000 ns
1 MHz mode
(2)
——ns
IM45 T
BF : SDA Bus Free Time 100 kHz mode 4.7 — s Time the bus must be
free before a new
transmission can start
400 kHz mode 1.3 — s
1 MHz mode
(2)
0.5 — s
IM50 C
B Bus Capacitive Loading — 400 pF
Note 1: BRG is the value of the I
2
C Baud Rate Generator. Refer to Section 17.3 “Setting Baud Rate When Operating
as a Bus Master”
for details.
2: Maximum pin capacitance = 10 pF for all I
2
C pins (for 1 MHz mode only).
SCLx
SDAx
In
SDAx
Out
Note: Refer to Figure 29-3 for load conditions.
IM11
IM10
IM40
IM26
IM25
IM20
IM21
IM45