Datasheet

Table Of Contents
2011-2017 Microchip Technology Inc. DS30009995E-page 265
PIC24FV32KA304 FAMILY
TABLE 29-1: THERMAL OPERATING CONDITIONS
Rating Symbol Min Typ Max Unit
Operating Junction Temperature Range T
J
-40 +140 °C
Operating Ambient Temperature Range T
A
-40 +125 °C
Power Dissipation:
Internal Chip Power Dissipation:
P
INT
= V
DD
x (I
DD
I
OH
)
P
D
P
INT
+ P
I
/
O
W
I/O Pin Power Dissipation:
P
I
/
O
= ({V
DD
V
OH
} x I
OH
) + (V
OL
x I
OL
)
Maximum Allowed Power Dissipation P
DMAX
(T
J
– T
A
)/
JA
W
TABLE 29-2: THERMAL PACKAGING CHARACTERISTICS
Characteristic Symbol Typ Max Unit Notes
Package Thermal Resistance, 20-Pin SPDIP
JA
62.4 °C/W
1
Package Thermal Resistance, 28-Pin SPDIP
JA
60 °C/W
1
Package Thermal Resistance, 20-Pin SSOP
JA
108 °C/W
1
Package Thermal Resistance, 28-Pin SSOP
JA
71 °C/W
1
Package Thermal Resistance, 20-Pin SOIC
JA
75 °C/W
1
Package Thermal Resistance, 28-Pin SOIC
JA
80.2 °C/W
1
Package Thermal Resistance, 28-Pin QFN
JA
32 °C/W
1
Package Thermal Resistance, 44-Pin QFN
JA
29 °C/W
1
Package Thermal Resistance, 48-Pin UQFN
JA
——°C/W
1
Note 1:
Junction to ambient thermal resistance, Theta-
JA
(
JA
) numbers are achieved by package simulations.
TABLE 29-3: DC CHARACTERISTICS: TEMPERATURE AND VOLTAGE SPECIFICATIONS
DC CHARACTERISTICS
Standard Operating Conditions: 1.8V to 3.6V PIC24F32KA3XX
2.0V to 5.5V PIC24FV32KA3XX
Operating temperature -40°C T
A
+85°C for Industrial
-40°C T
A
+125°C for Extended
Param
No.
Symbol Characteristic Min Typ
(1)
Max Units Conditions
DC10 V
DD
Supply Voltage
1.8 3.6 V For F devices
2.0 5.5 V For FV devices
DC12 V
DR
RAM Data Retention
Voltage
(2)
1.5 V For F devices
1.7 V For FV devices
DC16 V
POR
V
DD
Start Voltage
to Ensure Internal
Power-on Reset Signal
V
SS
—50mVV
DD
must be maintained in this range
for at least 64ms.
DC17 SV
DD
V
DD
Rise Rate
to Ensure Internal
Power-on Reset Signal
0.05 V/ms 0-3.3V in 0.1s
0-2.5V in 60 ms
Note 1:
Data in “Typ” column is at 3.3V, +25°C unless otherwise stated. Parameters are for design guidance only
and are not tested.
2:
This is the limit to which V
DD
can be lowered without losing RAM data.