Datasheet

Table Of Contents
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DS30009995E-page 218 2011-2017 Microchip Technology Inc.
REGISTER 22-8: AD1CSSH: A/D INPUT SCAN SELECT REGISTER (HIGH WORD)
(1)
U-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 U-0 U-0
CSS<30:26>
bit 15 bit 8
U-0 U-0 U-0 U-0 U-0 U-0 R/W-0 R/W-0
CSS<17:16>
bit 7 bit 0
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 15
Unimplemented:
Read as ‘0
bit 14-10
CSS<30:26>:
A/D Input Scan Selection bits
1 = Includes corresponding channel for input scan
0 = Skips channel for input scan
bit 9-2
Unimplemented:
Read as ‘0
bit 1-0
CSS<17:16>:
A/D Input Scan Selection bits
1 = Includes corresponding channel for input scan
0 = Skips channel for input scan
Note 1:
Unimplemented channels are read as ‘0. Do not select unimplemented channels for sampling as
indeterminate results may be produced.
REGISTER 22-9: AD1CSSL: A/D INPUT SCAN SELECT REGISTER (LOW WORD)
(1)
R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0
CSS<15:8>
bit 15 bit 8
R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0
CSS<7:0>
bit 7 bit 0
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 15-0
CSS<15:0>:
A/D Input Scan Selection bits
1 = Includes corresponding ANx input for scan
0 = Skips channel for input scan
Note 1:
Unimplemented channels are read as ‘0. Do not select unimplemented channels for sampling as
indeterminate results may be produced.