Datasheet

ManualsBrandsMicrochip ManualsEmbedded Processors & ControllersGeneral Purpose Flash Microcontroller 16bit 256KB TQFP

 2007-2019 Microchip Technology Inc. DS30009905F-page 51

PIC24FJ256GA110 FAMILY

TABLE 4-22: PARALLEL MASTER/SLAVE PORT REGISTER MAP

File

Name

Addr Bit 15 Bit 14 Bit 13 Bit 12 Bit 11 Bit 10 Bit 9 Bit 8 Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0

All

Resets

PMCON 0600 PMPEN

— PSIDL ADRMUX[1:0] PTBEEN PTWREN PTRDEN CSF[1:0] ALP CS2P CS1P BEP WRSP RDSP 0000

PMMODE 0602 BUSY IRQM[1:0] INCM[1:0] MODE16 MODE[1:0] WAITB[1:0] WAITM[3:0] WAITE[1:0] 0000

PMADDR 0604 CS[2:1] ADDR[13:0] 0000

PMDOUT1 Parallel Port Data Out Register 1 (Buffers 0 and 1) 0000

PMDOUT2 0606 Parallel Port Data Out Register 2 (Buffers 2 and 3) 0000

PMDIN1 0608 Parallel Port Data In Register 1 (Buffers 0 and 1) 0000

PMDIN2 060A Parallel Port Data In Register 2 (Buffers 2 and 3) 0000

PMAEN 060C PTEN[15:0] 0000

PMSTAT 060E IBF IBOV

— — IB3F IB2F IB1F IB0F OBE OBUF — — OB3E OB2E OB1E OB0E 0000

Legend: — = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.

TABLE 4-23: REAL-TIME CLOCK AND CALENDAR REGISTER MAP

File

Name

Addr Bit 15 Bit 14 Bit 13 Bit 12 Bit 11 Bit 10 Bit 9 Bit 8 Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0

All

Resets

ALRMVAL 0620 Alarm Value Register Window Based on ALRMPTR[1:0] xxxx

ALCFGRPT 0622 ALRMEN CHIME AMASK[3:0] ALRMPTR[1:0] ARPT[7:0] 0000

RTCVAL 0624 RTCC Value Register Window Based on RTCPTR[1:0] xxxx

RCFGCAL 0626 RTCEN

— RTCWREN RTCSYNC HALFSEC RTCOE RTCPTR[1:0] CAL[7:0] xxxx

Legend: — = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.

TABLE 4-24: COMPARATORS REGISTER MAP

File

Name

Addr Bit 15 Bit 14 Bit 13 Bit 12 Bit 11 Bit 10 Bit 9 Bit 8 Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0

All

Resets

CMSTAT 0630 CMIDL

— — — — C3EVT C2EVT C1EVT — — — — — C3OUT C2OUT C1OUT 0000

CVRCON 0632

— — — — — — — — CVREN CVROE CVRR CVRSS CVR[3:0] 0000

CM1CON 0634 CEN COE CPOL

— — — CEVT COUT EVPOL[1:0] — CREF — — CCH[1:0] 0000

CM2CON 0636 CEN COE CPOL

— — — CEVT COUT EVPOL[1:0] — CREF — — CCH[1:0] 0000

CM3CON 0638 CEN COE CPOL

— — — CEVT COUT EVPOL[1:0] — CREF — — CCH[1:0] 0000

Legend: — = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.

TABLE 4-25: CRC REGISTER MAP

File

Name

Addr Bit 15 Bit 14 Bit 13 Bit 12 Bit 11 Bit 10 Bit 9 Bit 8 Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0

All

Resets

CRCCON 0640 — — CSIDL VWORD[4:0] CRCFUL CRCMPT — CRCGO PLEN[3:0] 0040

CRCXOR 0642 X[15:1]

— 0000

CRCDAT 0644 CRC Data Input Register 0000

CRCWDAT 0646 CRC Result Register 0000

Legend: — = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.