Datasheet
PIC24FJ256GA110 FAMILY
DS30009905F-page 250 2007-2019 Microchip Technology Inc.
REGISTER 25-2: CW2: FLASH CONFIGURATION WORD 2
r-1 r-1 r-1 r-1 r-1 r-1 r-1 r-1
— — — — — — — —
bit 23 bit 16
R/PO-1 r-1 r-1 r-1 r-1 R/PO-1 R/PO-1 R/PO-1
IESO
— — — — FNOSC2 FNOSC1 FNOSC0
bit 15 bit 8
R/PO-1 R/PO-1 R/PO-1 R/PO-1 r-1 R/PO-1 R/PO-1 R/PO-1
FCKSM1 FCKSM0 OSCIOFCN IOL1WAY
— I2C2SEL
(1)
POSCMD1 POSCMD0
bit 7 bit 0
Legend: r = Reserved bit -n = Value when device is unprogrammed
R = Readable bit PO = Program Once bit U = Unimplemented bit, read as ‘0’
‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 23-16 Reserved: Always maintain as ‘1’
bit 15 IESO: Internal External Switchover bit
1 = IESO mode (Two-Speed Start-up) enabled
0 = IESO mode (Two-Speed Start-up) disabled
bit 14-11 Reserved: Always maintain as ‘1’
bit 10-8 FNOSC[2:0]: Initial Oscillator Select bits
111 = Fast RC Oscillator with Postscaler (FRCDIV)
110 = Reserved
101 = Low-Power RC Oscillator (LPRC)
100 = Secondary Oscillator (SOSC)
011 = Primary Oscillator with PLL module (XTPLL, HSPLL, ECPLL)
010 = Primary Oscillator (XT, HS, EC)
001 = Fast RC Oscillator with Postscaler and PLL module (FRCPLL)
000 = Fast RC Oscillator (FRC)
bit 7-6 FCKSM[1:0]: Clock Switching and Fail-Safe Clock Monitor Configuration bits
1x = Clock switching and Fail-Safe Clock Monitor are disabled
01 = Clock switching is enabled, Fail-Safe Clock Monitor is disabled
00 = Clock switching is enabled, Fail-Safe Clock Monitor is enabled
bit 5 OSCIOFCN: OSCO Pin Configuration bit
If POSCMD[1:0] =
11 or 00:
1 = OSCO/CLKO/RC15 functions as CLKO (FOSC/2)
0 = OSCO/CLKO/RC15 functions as port I/O (RC15)
If POSCMD[1:0] =
10 or 01:
OSCIOFCN has no effect on OSCO/CLKO/RC15.
bit 4 IOL1WAY: IOLOCK One-Way Set Enable bit
1 = The IOLOCK bit (OSCCON[6]) can be set once, provided the unlock sequence has been
completed; once set, the Peripheral Pin Select registers cannot be written to a second time
0 = The IOLOCK bit can be set and cleared as needed, provided the unlock sequence has been
completed
bit 3 Reserved: Always maintain as ‘1’
bit 2 I2C2SEL: I2C2 Pin Select bit
(1)
1 = Use SCL2/SDA2 pins for I2C2
0 = Use ASCL2/ASDA2 pins for I2C2
Note 1: Implemented in 100-pin devices only; otherwise unimplemented, read as ‘1’.