Datasheet

 2007-2019 Microchip Technology Inc. DS30009905F-page 207
PIC24FJ256GA110 FAMILY
REGISTER 18-3: PMADDR: PARALLEL MASTER PORT ADDRESS REGISTER
R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0
CS2 CS1 ADDR[13:8]
bit 15 bit 8
R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0
ADDR[7:0]
bit 7 bit 0
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 15 CS2: Chip Select 2 bit
1 = Chip Select 2 is active
0 = Chip Select 2 is inactive
bit 14 CS1: Chip Select 1 bit
1 = Chip Select 1 is active
0 = Chip Select 1 is inactive
bit 13-0 ADDR[13:0]: Parallel Port Destination Address bits
REGISTER 18-4: PMAEN: PARALLEL MASTER PORT ENABLE REGISTER
R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0
PTEN[15:14] PTEN[13:8]
bit 15 bit 8
R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0
PTEN[7:2] PTEN[1:0]
bit 7 bit 0
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 15-14 PTEN[15:14]: PMCSx Strobe Enable bits
1 = PMA15 and PMA14 function as either PMA[15:14] or PMCS2 and PMCS1
0 = PMA15 and PMA14 function as port I/Os
bit 13-2 PTEN[13:2]: PMP Address Port Enable bits
1 = PMA[13:2] function as PMP address lines
0 = PMA[13:2] function as port I/Os
bit 1-0 PTEN[1:0]: PMALH/PMALL Strobe Enable bits
1 = PMA1 and PMA0 function as either PMA[1:0] or PMALH and PMALL
0 = PMA1 and PMA0 pads functions as port I/Os