Datasheet

PIC18F97J60 FAMILY
DS39762F-page 90 2011 Microchip Technology Inc.
6.3.5 ETHERNET SFRs
In addition to the standard SFR set in Bank 15,
members of the PIC18F97J60 family have a second
set of SFRs. This group, associated exclusively with
the Ethernet module, occupies the top half of Bank 14
(E80h to EFFh).
A complete list of Ethernet SFRs is given in Table 6-4 .
All SFRs are fully described in Table 6-5 .
Note: To improve performance, frequently
accessed Ethernet registers are located in
the standard SFR bank (F60h through
FFFh).
TABLE 6-4: ETHERNET SFR MAP FOR PIC18F97J60 FAMILY DEVICES
Address Name Address Name Address Name Address Name
EFFh
(1)
EDFh
(1)
EBFh
(1)
E9Fh
(1)
EFEh ECON2 EDEh
(1)
EBEh
(1)
E9Eh
(1)
EFDh ESTAT EDDh
(1)
EBDh
(1)
E9Dh
(1)
EFCh
(1)
EDCh
(1)
EBCh
(1)
E9Ch
(1)
EFBh EIE EDBh
(1)
EBBh
(1)
E9Bh
(1)
EFAh
(1)
EDAh
(1)
EBAh
(1)
E9Ah
(1)
EF9h
(2)
ED9h EPKTCNT EB9h MIRDH E99h EPAUSH
EF8h
(2)
ED8h ERXFCON EB8h MIRDL E98h EPAUSL
EF7h EDMACSH ED7h
(1)
EB7h MIWRH E97h EFLOCON
EF6h EDMACSL ED6h
(1)
EB6h MIWRL E96h
(2)
EF5h EDMADSTH ED5h EPMOH EB5h
(1)
E95h
(2)
EF4h EDMADSTL ED4h EPMOL EB4h MIREGADR E94h
(2)
EF3h EDMANDH ED3h
(2)
EB3h
(2)
E93h
(2)
EF2h EDMANDL ED2h
(2)
EB2h MICMD E92h
(2)
EF1h EDMASTH ED1h EPMCSH EB1h
(1)
E91h
(2)
EF0h EDMASTL ED0h EPMCSL EB0h
(1)
E90h
(2)
EEFh ERXWRPTH ECFh EPMM7 EAFh
(2)
E8Fh
(2)
EEEh ERXWRPTL ECEh EPMM6 EAEh
(1)
E8Eh
(2)
EEDh ERXRDPTH ECDh EPMM5 EADh
(1)
E8Dh
(2)
EECh ERXRDPTL ECCh EPMM4 EACh
(1)
E8Ch
(2)
EEBh ERXNDH ECBh EPMM3 EABh MAMXFLH E8Bh
(2)
EEAh ERXNDL ECAh EPMM2 EAAh MAMXFLL E8Ah MISTAT
EE9h ERXSTH EC9h EPMM1 EA9h
(1)
E89h
(1)
EE8h ERXSTL EC8h EPMM0 EA8h
(1)
E88h
(1)
EE7h ETXNDH EC7h EHT7 EA7h MAIPGH E87h
(1)
EE6h ETXNDL EC6h EHT6 EA6h MAIPGL E86h
(1)
EE5h ETXSTH EC5h EHT5 EA5h
(2)
E85h MAADR2
EE4h ETXSTL EC4h EHT4 EA4h MABBIPG E84h MAADR1
EE3h EWRPTH EC3h EHT3 EA3h MACON4 E83h MAADR4
EE2h EWRPTL EC2h EHT2 EA2h MACON3 E82h MAADR3
EE1h
(1)
EC1h EHT1 EA1h
(1)
E81h MAADR6
EE0h
(1)
EC0h EHT0 EA0h MACON1 E80h MAADR5
Note 1: Reserved register location; do not modify.
2: Unimplemented registers are read as ‘0’.