Datasheet

 2011 Microchip Technology Inc. DS39762F-page 7
PIC18F97J60 FAMILY
Pin Diagrams (Continued)
92 94 93 91 90 89 88 87 86 85 84 83 82 81 80 79 78
20
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
65
64
63
62
61
60
59
26
56
45 44 43 42 41 40 39 28 29 30 31 32 33 34 35 36 37 38
17
18
19
21
22
95
1
76 77
72
71
70
69
68
67
66
75
74
73
58
57
24
23
25
96 98 97 99
27 46 47 48 49 50
55
54
53
52
51
100
100-Pin TQFP
RB0/INT0/FLT0
RB1/INT1
RB2/INT2
RB3/INT3/ECCP2
(1)
/P2A
(1)
RB4/KBI0
RB5/KBI1
RB6/KBI2/PGC
V
SS
OSC2/CLKO
OSC1/CLKI
V
DD
RB7/KBI3/PGD
RC4/SDI1/SDA1
RC3/SCK1/SCL1
RC2/ECCP1/P1A
RC5/SDO1
RJ7/UB
RJ6/LB
RJ2/WRL
RJ3/WRH
RE1/AD9/WR/P2C
RE0/AD8/RD
/P2D
RG0/ECCP3/P3A
RG1/TX2/CK2
RG2/RX2/DT2
RG3/CCP4/P3D
MCLR
RG4/CCP5/P1D
V
SS
VDDCORE/VCAP
RF7/SS1
RH2/A18
RH3/A19
RH7/AN15/P1B
(2)
RH6/AN14/P1C
(2)
RF5/AN10/CVREF
RF4/AN9
RF3/AN8
RF2/AN7/C1OUT
RF6/AN11
RE2/AD10/CS/P2B
RE3/AD11/P3C
(2)
RE4/AD12/P3B
(2)
RE5/AD13/P1C
(2)
RE6/AD14/P1B
(2)
RE7/AD15/ECCP2
(1)
/P2A
(1)
RD0/AD0/PSP0 V
DD
VSS RD1/AD1/PSP1 RD2/AD2/PSP2 RD3/AD3/PSP3 RD4/AD4/PSP4/SDO2 RD5/AD5/PSP5/SDI2/SDA2 RD6/AD6/PSP6/SCK2/SCL2
RJ0/ALE
RJ1/OE
RH1/A17 RH0/A16
ENVREG
RF1/AN6/C2OUT
AV
DD
AVSS
RA3/AN3/VREF+
RA2/AN2/V
REF-
RA1/LEDB/AN1 RA0/LEDA/AN0
V
SS
VDD
RA4/T0CKI
RA5/AN4
RC1/T1OSI/ECCP2
(1)
/P2A
(1)
RC0/T1OSO/T13CKI
RC7/RX1/DT1
RC6/TX1/CK1
RH5/AN13/P3B
(2)
RH4/AN12/P3C
(2)
RJ5/CE
RJ4/BA0
VSS
VSSPLL VDDPLL RBIAS V
SSTX
TPOUT+ TPOUT- V
DDTX
VDDRX
TPIN+
TPIN-
V
SSRX
RG6
RG5
RF0/AN5
V
DD
RG7
V
SS
RD7/AD7/PSP7/SS2
VDD
PIC18F96J65
PIC18F97J60
Note 1: The ECCP2/P2A pin placement depends on the CCP2MX Configuration bit and Processor mode settings.
2: P1B, P1C, P3B and P3C pin placement depends on the ECCPMX Configuration bit setting.
NC
PIC18F96J60
82 81 80 79 78 76 77