Datasheet

 2011 Microchip Technology Inc. DS39762F-page 67
PIC18F97J60 FAMILY
FIGURE 5-5: TIME-OUT SEQUENCE ON POWER-UP (MCLR NOT TIED TO VDD): CASE 2
FIGURE 5-6: SLOW RISE TIME (MCLR
TIED TO VDD, VDD RISE > TPWRT)
VDD
MCLR
INTERNAL POR
PWRT TIME-OUT
INTERNAL RESET
TPWRT
VDD
MCLR
INTERNAL POR
PWRT TIME-OUT
INTERNAL RESET
0V
1V
3.3V
T
PWRT