Datasheet

 2011 Microchip Technology Inc. DS39762F-page 453
PIC18F97J60 FAMILY
FIGURE 28-11: EXAMPLE SPI MASTER MODE TIMING (CKE = 0)
TABLE 28-16: EXAMPLE SPI MODE REQUIREMENTS (MASTER MODE, CKE = 0)
Param
No.
Symbol Characteristic Min Max Units Conditions
73 T
DIV2SCH,
T
DIV2SCL
Setup Time of SDIx Data Input to SCKx Edge 100 — ns
74 TSCH2DIL,
T
SCL2DIL
Hold Time of SDIx Data Input to SCKx Edge 100 — ns
75 TDOR SDOx Data Output Rise Time — 25 ns
76 TDOF SDOx Data Output Fall Time — 25 ns
78 T
SCR SCKx Output Rise Time — 25 ns
79 TSCF SCKx Output Fall Time — 25 ns
80 T
SCH2DOV,
T
SCL2DOV
SDOx Data Output Valid after SCKx Edge — 50 ns
SCKx
(CKP = 0)
SCKx
(CKP = 1)
SDOx
SDIx
73
74
75, 76
78
79
80
79
78
MSb
LSbbit 6 - - - - - - 1
MSb In
LSb In
bit 6 - - - - 1
Note: Refer to Figure 28-3 for load conditions.