Datasheet

PIC18F97J60 FAMILY
DS39762F-page 436 2011 Microchip Technology Inc.
Supply Current (I
DD)
(2)
All devices 0.5 1.1 mA -40°C
V
DD = 2.0V,
V
DDCORE = 2.0V
(4)
FOSC = 1 MHz
(PRI_IDLE mode,
EC oscillator)
0.5 1.1 mA +25°C
0.6 1.2 mA +85°C
All devices 0.9 1.4 mA -40°C
V
DD = 2.5V,
V
DDCORE = 2.5V
(4)
0.9 1.4 mA +25°C
1.0 1.5 mA +85°C
All devices 1.9 2.6 mA -40°C
V
DD = 3.3V
(5)
1.8 2.6 mA +25°C
1.9 2.6 mA +85°C
All devices 5.9 9.5 mA -40°C
V
DD = 2.5V,
V
DDCORE = 2.5V
(4)
FOSC = 25 MHZ
(PRI_IDLE mode,
EC oscillator)
5.6 9.5 mA +25°C
5.9 9.5 mA +85°C
All devices 7.5 13.2 mA -40°C
V
DD = 3.3V
(5)
7.2 13.2 mA +25°C
7.5 13.2 mA +85°C
All devices 8.6 14.0 mA -40°C
V
DD = 2.5V,
V
DDCORE = 2.5V
(4)
FOSC = 41.6667 MHz
(PRI_IDLE mode,
EC oscillator)
8.0 14.0 mA +25°C
8.6 14.0 mA +85°C
All devices 9.8 16.0 mA -40°C
V
DD = 3.3V
(5)
9.4 16.0 mA +25°C
9.8 16.0 mA +85°C
28.2 DC Characteristics: Power-Down and Supply Current
PIC18F97J60 Family (Industrial) (Continued)
PIC18F97J60 Family
(Industrial)
Standard Operating Conditions (unless otherwise stated)
Operating temperature -40°C T
A +85°C for industrial
Param
No.
Device Typ Max Units Conditions
Note 1: The power-down current in Sleep mode does not depend on the oscillator type. Power-down current is measured with
the part in Sleep mode, with all I/O pins in high-impedance state and tied to V
DD or VSS, and all features that add delta
current disabled (such as WDT, Timer1 oscillator, etc.).
2: The supply current is mainly a function of operating voltage, frequency and mode. Other factors, such as I/O pin loading
and switching rate, oscillator type and circuit, internal code execution pattern and temperature, also have an impact on
the current consumption.
The test conditions for all I
DD measurements in active operation mode are:
OSC1 = external square wave, from rail-to-rail; all I/O pins tri-stated, pulled to V
DD;
MCLR
= VDD; WDT enabled/disabled as specified.
3: Standard, low-cost 32 kHz crystals have an operating temperature range of -10°C to +70°C. Extended temperature
crystals are available at a much higher cost.
4: Voltage regulator disabled (ENVREG = 0, tied to V
SS).
5: Voltage regulator enabled (ENVREG = 1, tied to V
DD).
6: For I
ETH, the specified current includes current sunk through TPOUT+ and TPOUT-. LEDA and LEDB are disabled for
all testing.