Datasheet

 2011 Microchip Technology Inc. DS39762F-page 433
PIC18F97J60 FAMILY
Supply Current (IDD)
(2,3)
All devices 12.0 34.0 A -40°C
V
DD = 2.0V,
V
DDCORE = 2.0V
(4)
FOSC = 31 kHz
(RC_RUN mode,
Internal Oscillator Source)
12.0 34.0 A+25°C
74.0 108.0 A+85°C
All devices 20.0 45.0 A -40°C
V
DD = 2.5V,
V
DDCORE = 2.5V
(4)
20.0 45.0 A+25°C
82.0 126.0 A+85°C
All devices 105.0 168.0 A -40°C
V
DD = 3.3V
(5)
105.0 168.0 A+25°C
182.0 246.0 A+85°C
All devices 8.0 32.0 A -40°C
V
DD = 2.0V,
V
DDCORE = 2.0V
(4)
FOSC = 31 kHz
(RC_IDLE mode,
Internal Oscillator Source)
8.0 32.0 A+25°C
62.0 98.0 A+85°C
All devices 12.0 35.0 A -40°C
V
DD = 2.5V,
V
DDCORE = 2.5V
(4)
12.0 35.0 A+25°C
70.0 95.0 A+85°C
All devices 90.0 152.0 A -40°C
V
DD = 3.3V
(5)
90.0 152.0 A+25°C
170.0 225.0 A+85°C
28.2 DC Characteristics: Power-Down and Supply Current
PIC18F97J60 Family (Industrial) (Continued)
PIC18F97J60 Family
(Industrial)
Standard Operating Conditions (unless otherwise stated)
Operating temperature -40°C  T
A  +85°C for industrial
Param
No.
Device Typ Max Units Conditions
Note 1: The power-down current in Sleep mode does not depend on the oscillator type. Power-down current is measured with
the part in Sleep mode, with all I/O pins in high-impedance state and tied to V
DD or VSS, and all features that add delta
current disabled (such as WDT, Timer1 oscillator, etc.).
2: The supply current is mainly a function of operating voltage, frequency and mode. Other factors, such as I/O pin loading
and switching rate, oscillator type and circuit, internal code execution pattern and temperature, also have an impact on
the current consumption.
The test conditions for all I
DD measurements in active operation mode are:
OSC1 = external square wave, from rail-to-rail; all I/O pins tri-stated, pulled to V
DD;
MCLR
= VDD; WDT enabled/disabled as specified.
3: Standard, low-cost 32 kHz crystals have an operating temperature range of -10°C to +70°C. Extended temperature
crystals are available at a much higher cost.
4: Voltage regulator disabled (ENVREG = 0, tied to V
SS).
5: Voltage regulator enabled (ENVREG = 1, tied to V
DD).
6: For I
ETH, the specified current includes current sunk through TPOUT+ and TPOUT-. LEDA and LEDB are disabled for
all testing.