Datasheet

PIC18F97J60 FAMILY
DS39762F-page 364 2011 Microchip Technology Inc.
REGISTER 25-5: CONFIG3L: CONFIGURATION REGISTER 3 LOW (BYTE ADDRESS 300004h)
R/WO-1 R/WO-1 R/WO-1 R/WO-1 R/WO-1 U-0 U-0 U-0
WAIT
(1)
BW
(1)
EMB1
(1)
EMB0
(1)
EASHFT
(1)
bit 7 bit 0
Legend:
R = Readable bit WO = Write-Once bit U = Unimplemented bit, read as ‘0
-n = Value when device is unprogrammed ‘1’ = Bit is set ‘0’ = Bit is cleared
bit 7 WAIT: External Bus Wait Enable bit
(1)
1 = Wait states for operations on external memory bus is disabled
0 = Wait states for operations on external memory bus is enabled and selected by MEMCON<5:4>
bit 6 BW: Data Bus Width Select bit
(1)
1 = 16-Bit Data Width mode
0 = 8-Bit Data Width mode
bit 5-4 EMB<1:0>: External Memory Bus Configuration bits
(1)
11 = Microcontroller mode, external bus disabled
10 = Extended Microcontroller mode,12-Bit Addressing mode
01 = Extended Microcontroller mode,16-Bit Addressing mode
00 = Extended Microcontroller mode, 20-Bit Addressing mode
bit 3 EASHFT: External Address Bus Shift Enable bit
(1)
1 = Address shifting is enabled; address on external bus is offset to start at 000000h
0 = Address shifting is disabled; address on external bus reflects the PC value
bit 2-0 Unimplemented: Read as ‘0
Note 1: Implemented on 100-pin devices only.