Datasheet

 2011 Microchip Technology Inc. DS39762F-page 361
PIC18F97J60 FAMILY
REGISTER 25-1: CONFIG1L: CONFIGURATION REGISTER 1 LOW (BYTE ADDRESS 300000h)
R/WO-1 R/WO-1 R/WO-0 U-0 U-0 U-0 U-0 R/WO-1
DEBUG
XINST STVREN — — — —WDTEN
bit 7 bit 0
Legend:
R = Readable bit WO = Write-Once bit U = Unimplemented bit, read as ‘0’
-n = Value when device is unprogrammed ‘1’ = Bit is set ‘0’ = Bit is cleared
bit 7 DEBUG
: Background Debugger Enable bit
1 = Background debugger is disabled; RB6 and RB7 are configured as general purpose I/O pins
0 = Background debugger is enabled; RB6 and RB7 are dedicated to In-Circuit Debug
bit 6 XINST: Extended Instruction Set Enable bit
1 = Instruction set extension and Indexed Addressing mode are enabled
0 = Instruction set extension and Indexed Addressing mode are disabled (Legacy mode)
bit 5 STVREN: Stack Overflow/Underflow Reset Enable bit
1 = Reset on stack overflow/underflow is enabled
0 = Reset on stack overflow/underflow is disabled
bit 4-1 Unimplemented: Read as ‘0’
bit 0 WDTEN: Watchdog Timer Enable bit
1 = WDT is enabled
0 = WDT is disabled (control is placed on SWDTEN bit)
REGISTER 25-2: CONFIG1H: CONFIGURATION REGISTER 1 HIGH (BYTE ADDRESS 300001h)
U-0 U-0 U-0 U-0 U-0
(1)
R/WO-1 U-0 U-0
—
(2)
—
(2)
—
(2)
—
(2)
—CP0— —
bit 7 bit 0
Legend:
R = Readable bit WO = Write-Once bit U = Unimplemented bit, read as ‘0’
-n = Value when device is unprogrammed ‘1’ = Bit is set ‘0’ = Bit is cleared
bit 7-3 Unimplemented: Read as ‘0’
bit 2 CP0: Code Protection bit
1 = Program memory is not code-protected
0 = Program memory is code-protected
bit 1-0 Unimplemented: Read as ‘0’
Note 1: This bit should always be maintained as ‘0’.
2: The value of these bits in program memory should always be ‘1’. This ensures that the location is
executed as a NOP if it is accidentally executed.