Datasheet
PIC18F97J60 FAMILY
DS39762F-page 340 2011 Microchip Technology Inc.
REGISTER 22-2: ADCON1: A/D CONTROL REGISTER 1
U-0 U-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0
— — VCFG1 VCFG0 PCFG3 PCFG2 PCFG1 PCFG0
bit 7 bit 0
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 7-6 Unimplemented: Read as ‘0’
bit 5 VCFG1: Voltage Reference Configuration bit (V
REF- source)
1 = VREF- (AN2)
0 = AV
SS
bit 4 VCFG0: Voltage Reference Configuration bit (VREF+ source)
1 = VREF+ (AN3)
0 = AV
DD
bit 3-0 PCFG<3:0>: A/D Port Configuration Control bits:
Note 1: AN12 through AN15 are available in 80-pin and 100-pin devices only.
2: AN5 is available in 100-pin devices only.
3: AN0 and AN1 can also operate as Ethernet LED outputs in either Analog or Digital I/O modes.
A = Analog input D = Digital I/O
PCFG<3:0>
AN15
(1)
AN14
(1)
AN13
(1)
AN12
(1)
AN11
AN10
AN9
AN8
AN7
AN6
AN5
(2)
AN4
AN3
AN2
AN1
(3)
AN0
(3)
0000 AAAAAAAAAAAAAAAA
0001 DDAAAAAAAAAAAAAA
0010 DDDAAAAAAAAAAAAA
0011 DDDDAAAAAAAAAAAA
0100 DDDDDAA A A AAAAAAA
0101 DDDDDDAAAAAAAAAA
0110 DDDDDDD A A AAA AAAA
0111 DDDDDDD D A AAAAAAA
1000 DDDDDDDDDAAAAAAA
1001 DDDDDDDDDDAAAAAA
1010 DDDDDDDDDDDAAAAA
1011 DDDDDDDDDDDDAAAA
1100 DDDDDDDDDDDDDAAA
1101 DDDDDDDDDDDDDDAA
1110 DDDDDDDDDDDDDDDA
1111 DDDDDDDDDDDDDDDD