Datasheet

PIC18F97J60 FAMILY
DS39762F-page 34 2011 Microchip Technology Inc.
PORTB is a bidirectional I/O port. PORTB can be software
programmed for internal weak pull-ups on all inputs.
RB0/INT0/FLT0
RB0
INT0
FLT0
5
I/O
I
I
TTL
ST
ST
Digital I/O.
External Interrupt 0.
Enhanced PWM Fault input (ECCP modules); enabled
in software.
RB1/INT1
RB1
INT1
6
I/O
I
TTL
ST
Digital I/O.
External Interrupt 1.
RB2/INT2
RB2
INT2
7
I/O
I
TTL
ST
Digital I/O.
External Interrupt 2.
RB3/INT3/ECCP2/P2A
RB3
INT3
ECCP2
(1)
P2A
(1)
8
I/O
I
I/O
O
TTL
ST
ST
Digital I/O.
External Interrupt 3.
Capture 2 input/Compare 2 output/PWM2 output.
ECCP2 PWM Output A.
RB4/KBI0
RB4
KBI0
69
I/O
I
TTL
TTL
Digital I/O.
Interrupt-on-change pin.
RB5/KBI1
RB5
KBI1
68
I/O
I
TTL
TTL
Digital I/O.
Interrupt-on-change pin.
RB6/KBI2/PGC
RB6
KBI2
PGC
67
I/O
I
I/O
TTL
TTL
ST
Digital I/O.
Interrupt-on-change pin.
In-Circuit Debugger and ICSP™ programming clock pin.
RB7/KBI3/PGD
RB7
KBI3
PGD
57
I/O
I
I/O
TTL
TTL
ST
Digital I/O.
Interrupt-on-change pin.
In-Circuit Debugger and ICSP programming data pin.
TABLE 1-6: PIC18F96J60/96J65/97J60 PINOUT I/O DESCRIPTIONS (CONTINUED)
Pin Name
Pin Number
Pin
Type
Buffer
Type
Description
TQFP
Legend: TTL = TTL compatible input CMOS = CMOS compatible input or output
ST = Schmitt Trigger input with CMOS levels Analog = Analog input
I = Input O = Output
P = Power OD = Open-Drain (no P diode to V
DD)
Note 1: Alternate assignment for ECCP2/P2A when CCP2MX Configuration bit is cleared (Extended Microcontroller mode).
2: Default assignment for ECCP2/P2A for all devices in all operating modes (CCP2MX Configuration bit is set).
3: Default assignments for P1B/P1C/P3B/P3C (ECCPMX Configuration bit is set).
4: Alternate assignment for ECCP2/P2A when CCP2MX Configuration bit is cleared (Microcontroller mode).
5: Alternate assignments for P1B/P1C/P3B/P3C (ECCPMX Configuration bit is cleared).