Datasheet

PIC18F97J60 FAMILY
DS39762F-page 32  2011 Microchip Technology Inc.
PORTJ is a bidirectional I/O port.
RJ4 39 I/O ST Digital I/O.
RJ5 40 I/O ST Digital I/O
V
SS 11, 31, 51, 70 P — Ground reference for logic and I/O pins.
V
DD 32, 48, 71 P — Positive supply for peripheral digital logic and I/O pins.
AV
SS 26 P — Ground reference for analog modules.
AV
DD 25 P — Positive supply for analog modules.
ENVREG 24 I ST Enable for on-chip voltage regulator.
V
DDCORE/VCAP
VDDCORE
VCAP
12
P
P
—
—
Core logic power or external filter capacitor connection.
Positive supply for microcontroller core logic
(regulator disabled).
External filter capacitor connection (regulator enabled).
V
SSPLL 67 P — Ground reference for Ethernet PHY PLL.
VDDPLL 66 P — Positive 3.3V supply for Ethernet PHY PLL.
V
SSTX 64 P — Ground reference for Ethernet PHY transmit subsystem.
VDDTX 61 P — Positive 3.3V supply for Ethernet PHY transmit subsystem.
V
SSRX 57 P — Ground reference for Ethernet PHY receive subsystem.
VDDRX 60 P — Positive 3.3V supply for Ethernet PHY receive subsystem.
RBIAS 65 I Analog Bias current for Ethernet PHY. Must be tied to V
SS via a resistor;
see Section 19.0 “Ethernet Module” for specification.
TPOUT+ 63 O — Ethernet differential signal output.
TPOUT- 62 O — Ethernet differential signal output.
TPIN+ 59 I Analog Ethernet differential signal input.
TPIN- 58 I Analog Ethernet differential signal input.
TABLE 1-5: PIC18F86J60/86J65/87J60 PINOUT I/O DESCRIPTIONS (CONTINUED)
Pin Name
Pin Number
Pin
Type
Buffer
Type
Description
TQFP
Legend: TTL = TTL compatible input CMOS = CMOS compatible input or output
ST = Schmitt Trigger input with CMOS levels Analog = Analog input
I = Input O = Output
P = Power OD = Open-Drain (no P diode to V
DD)
Note 1: Default assignment for ECCP2/P2A when CCP2MX Configuration bit is set.
2: Default assignments for P1B/P1C/P3B/P3C (ECCPMX Configuration bit is set).
3: Alternate assignment for ECCP2/P2A when CCP2MX Configuration bit is cleared.
4: Alternate assignments for P1B/P1C/P3B/P3C (ECCPMX Configuration bit is cleared).