Datasheet
2011 Microchip Technology Inc. DS39762F-page 255
PIC18F97J60 FAMILY
TABLE 19-6: SUMMARY OF REGISTERS ASSOCIATED WITH PACKET TRANSMISSION
TABLE 19-7: SUMMARY OF REGISTERS ASSOCIATED WITH PACKET RECEPTION
Register
Name
Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Reset
Values on
Page:
EIE
— PKTIE DMAIE LINKIE TXIE —TXERIERXERIE 73
EIR
— PKTIF DMAIF LINKIF TXIF —TXERIFRXERIF 73
ESTAT —BUFER— r — RXBUSY TXABRT PHYRDY 73
ECON1 TXRST
RXRST DMAST CSUMEN TXRTS RXEN — — 70
ETXSTL Transmit Start Register Low Byte (ETXST<7:0>) 74
ETXSTH
— — — Transmit Start Register High Byte (ETXST<12:8>) 74
ETXNDL Transmit End Register Low Byte (ETXND<7:0>) 74
ETXNDH
— — — Transmit End Register High Byte (ETXND<12:8>) 74
MACON1 — — — rTXPAUSRXPAUS PASSALL MARXEN 75
MACON3 PADCFG2 PADCFG1 PADCFG0 TXCRCEN PHDREN HFRMEN FRMLNEN FULDPX 75
MACON4
— DEFER r r — — r r 75
MABBIPG
— BBIPG6 BBIPG5 BBIPG4 BBIPG3 BBIPG2 BBIPG1 BBIPG0 75
MAIPGL
— MAC Non Back-to-Back Inter-Packet Gap Register Low Byte (MAIPGL<6:0>) 75
MAIPGH
— MAC Non Back-to-Back Inter-Packet Gap Register High Byte (MAIPGH<6:0>) 75
MAMXFLL Maximum Frame Length Register Low Byte (MAMXFL<7:0>) 74
MAMXFLH Maximum Frame Length Register High Byte (MAMXFL<15:8>) 74
Legend: — = unimplemented, r = reserved bit. Shaded cells are not used.
Register
Name
Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Reset
Values on
Page:
EIE
— PKTIE DMAIE LINKIE TXIE — TXERIE RXERIE 73
EIR — PKTIF DMAIF LINKIF TXIF — TXERIF RXERIF 73
ESTAT
—BUFER— r —RXBUSYTXABRT PHYRDY 73
ECON2 AUTOINC PKTDEC ETHEN — — — — — 73
ECON1
TXRST RXRST DMAST CSUMEN TXRTS RXEN — — 70
ERXSTL Receive Start Register Low Byte (ERXST<7:0>) 74
ERXSTH
— — — Receive Start Register High Byte (ERXST<12:8>) 74
ERXNDL Receive End Register Low Byte (ERXND<7:0>) 74
ERXNDH
— — — Receive End Register High Byte (ERXND<12:8>) 74
ERXRDPTL Receive Buffer Read Pointer Low Byte (ERXRDPT<7:0>) 73
ERXRDPTH
— — — Receive Buffer Read Pointer High Byte (ERXRDPT<12:8>) 73
ERXFCON UCEN ANDOR CRCEN PMEN MPEN HTEN MCEN BCEN 74
EPKTCNT Ethernet Packet Count Register 74
MACON1
— — — r TXPAUS RXPAUS PASSALL MARXEN 75
MACON3
PADCFG2 PADCFG1 PADCFG0 TXCRCEN PHDREN HFRMEN FRMLNEN FULDPX 75
MAMXFLL Maximum Frame Length Register Low Byte (MAMXFL<7:0>) 74
MAMXFLH Maximum Frame Length Register High Byte (MAMXFL<15:8>) 74
Legend: — = unimplemented, r = reserved bit. Shaded cells are not used.