Datasheet

 2011 Microchip Technology Inc. DS39762F-page 25
PIC18F97J60 FAMILY
TABLE 1-5: PIC18F86J60/86J65/87J60 PINOUT I/O DESCRIPTIONS
Pin Name
Pin Number
Pin
Type
Buffer
Type
Description
TQFP
MCLR
9 I ST Master Clear (Reset) input. This pin is an active-low Reset to
the device.
OSC1/CLKI
OSC1
CLKI
49
I
I
ST
CMOS
Oscillator crystal or external clock input.
Oscillator crystal input or external clock source input.
ST buffer when configured in internal RC mode; CMOS
otherwise.
External clock source input. Always associated with
pin function, OSC1. (See related OSC2/CLKO pin.)
OSC2/CLKO
OSC2
CLKO
50
O
O
—
—
Oscillator crystal or clock output.
Oscillator crystal output. Connects to crystal or
resonator in Crystal Oscillator mode.
In Internal RC mode, OSC2 pin outputs CLKO which has
1/4 the frequency of OSC1 and denotes the
instruction cycle rate.
PORTA is a bidirectional I/O port.
RA0/LEDA/AN0
RA0
LEDA
AN0
30
I/O
O
I
TTL
—
Analog
Digital I/O.
Ethernet LEDA indicator output.
Analog Input 0.
RA1/LEDB/AN1
RA1
LEDB
AN1
29
I/O
O
I
TTL
—
Analog
Digital I/O.
Ethernet LEDB indicator output.
Analog Input 1.
RA2/AN2/V
REF-
RA2
AN2
V
REF-
28
I/O
I
I
TTL
Analog
Analog
Digital I/O.
Analog Input 2.
A/D reference voltage (low) input.
RA3/AN3/V
REF+
RA3
AN3
V
REF+
27
I/O
I
I
TTL
Analog
Analog
Digital I/O.
Analog Input 3.
A/D reference voltage (high) input.
RA4/T0CKI
RA4
T0CKI
34
I/O
I
ST
ST
Digital I/O.
Timer0 external clock input.
RA5/AN4
RA5
AN4
33
I/O
I
TTL
Analog
Digital I/O.
Analog Input 4.
Legend: TTL = TTL compatible input CMOS = CMOS compatible input or output
ST = Schmitt Trigger input with CMOS levels Analog = Analog input
I = Input O = Output
P = Power OD = Open-Drain (no P diode to V
DD)
Note 1: Default assignment for ECCP2/P2A when CCP2MX Configuration bit is set.
2: Default assignments for P1B/P1C/P3B/P3C (ECCPMX Configuration bit is set).
3: Alternate assignment for ECCP2/P2A when CCP2MX Configuration bit is cleared.
4: Alternate assignments for P1B/P1C/P3B/P3C (ECCPMX Configuration bit is cleared).