Datasheet
PIC18F97J60 FAMILY
DS39762F-page 240 2011 Microchip Technology Inc.
REGISTER 19-14: EIE: ETHERNET INTERRUPT ENABLE REGISTER
U-0 R/W-0 R/W-0 R/W-0 R/W-0 U-0 R/W-0 R/W-0
— PKTIE DMAIE LINKIE TXIE — TXERIE RXERIE
bit 7 bit 0
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 7 Unimplemented: Read as ‘0’
bit 6 PKTIE: Receive Packet Pending Interrupt Enable bit
1 = Enable receive packet pending interrupt
0 = Disable receive packet pending interrupt
bit 5 DMAIE: DMA Interrupt Enable bit
1 = Enable DMA interrupt
0 = Disable DMA interrupt
bit 4 LINKIE: Link Status Change Interrupt Enable bit
1 = Enable link change interrupt from the PHY
0 = Disable link change interrupt
bit 3 TXIE: Transmit Enable bit
1 = Enable transmit interrupt
0 = Disable transmit interrupt
bit 2 Unimplemented: Read as ‘0’
bit 1 TXERIE: Transmit Error Interrupt Enable bit
1 = Enable transmit error interrupt
0 = Disable transmit error interrupt
bit 0 RXERIE: Receive Error Interrupt Enable bit
1 = Enable receive error interrupt
0 = Disable receive error interrupt