Datasheet
2011 Microchip Technology Inc. DS39762F-page 237
PIC18F97J60 FAMILY
REGISTER 19-12: PHSTAT2: PHYSICAL LAYER STATUS REGISTER 2
U-0 U-0 R-0 R-0 R-0 R-0 R-x U-0
— — TXSTAT RXSTAT COLSTAT LSTAT r —
bit 15 bit 8
U-0 U-0 R-0 U-0 U-0 U-0 U-0 U-0
— — r — — — — —
bit 7 bit 0
Legend: r = Reserved bit
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 15-14 Unimplemented: Read as ‘0’
bit 13 TXSTAT: PHY Transmit Status bit
1 = PHY is transmitting data
0 = PHY is not transmitting data
bit 12 RXSTAT: PHY Receive Status bit
1 = PHY is receiving data
0 = PHY is not receiving data
bit 11 COLSTAT: PHY Collision Status bit
1 = A collision is occuring (PHY is both transmitting and receiving while in Half-Duplex mode)
0 = A collision is not occuring
bit 10 LSTAT: PHY Collision Status bit
1 =Link is up
0 =Link is down
bit 9 Reserved: Ignore on read
bit 8-6 Unimplemented: Read as ‘0’
bit 5 Reserved: Ignore on read
bit 4-0 Unimplemented: Read as ‘0’