Datasheet

2011 Microchip Technology Inc. DS39762F-page 201
PIC18F97J60 FAMILY
TABLE 18-3: PIN CONFIGURATIONS FOR ECCP3
ECCP Mode
CCP3CON
Configuration
RD1 or
RG0
(1)
RE4 RE3
RD2 or
RG3
(1)
RH5
(2)
RH4
(2)
64-Pin Devices; 80-Pin Devices, ECCPMX = 1;
100-Pin Devices, ECCPMX = 1, Microcontroller mode:
Compatible CCP 00xx 11xx ECCP3
RE4 RE3 RD2/RG3 RH5/AN13 RH4/AN12
Dual PWM 10xx 11xx P3A P3B RE3 RD2/RG3 RH5/AN13 RH4/AN12
Quad PWM x1xx 11xx P3A P3B P3C P3D RH5/AN13 RH4/AN12
80-Pin Devices, ECCPMX = 0;
100-Pin Devices, ECCPMX = 0, All Program Memory modes:
Compatible CCP 00xx 11xx ECCP3
RE6/AD14 RE5/AD13 RD2/RG3 RH5/AN13 RH4/AN12
Dual PWM 10xx 11xx P3A
RE6/AD14 RE5/AD13 RD2/RG3 P3B RH4/AN12
Quad PWM
(3)
x1xx 11xx P3A RE6/AD14 RE5/AD13 P3D P3B P3C
100-Pin Devices, ECCPMX = 1, Extended Microcontroller with 12-Bit Address Width:
Compatible CCP 00xx 11xx ECCP3
RE4/AD12 RE3/AD11 RD2/RG3 RH5/AN13 RH4/AN12
Dual PWM 10xx 11xx P3A P3B
RE3/AD11 RD2/RG3 RH5/AN13 RH4/AN12
100-Pin Devices, ECCPMX = 1, Extended Microcontroller mode with 16-Bit or 20-Bit Address Width:
Compatible CCP 00xx 11xx ECCP3
RE6/AD14 RE5/AD13 RD2/RG3 RH5/AN13 RH4/AN12
Legend: x = Don’t care. Shaded cells indicate pin assignments not used by ECCP3 in a given mode.
Note 1: ECCP3/P3A and CCP4/P3D are multiplexed with RD1 and RD2 in 64-pin devices, and RG0 and RG3 in 80-pin
and 100-pin devices.
2: These pin options are not available in 64-pin devices.
3:
With ECCP3 in Quad PWM mode, the CCP4 pin’s output is overridden by P3D; otherwise, CCP4 is fully
operational.