Datasheet

PIC18F87K22 FAMILY
DS39960B-page 66 Preliminary 2010 Microchip Technology Inc.
REGISTER 4-4: PMD0: PERIPHERAL MODULE DISABLE REGISTER 0
(1,2,3)
R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0
CCP3MD CCP2MD CCP1MD UART2MD UART1MD SSP2MD SSP1MD ADCMD
bit 7 bit 0
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 7 CCP3MD: PMD ECCP3 Enable/Disable bit
1 = Peripheral Module Disable (PMD) is enabled for ECCP3, disabling all of its clock sources
0 = PMD is disabled for ECCP3
bit 6 CCP2MD: PMD ECCP2 Enable/Disable bit
1 = PMD is enabled for ECCP2, disabling all of its clock sources
0 = PMD is disabled for ECCP2
bit 5 CCP1MD: PMD ECCP1 Enable/Disable bit
1 = PMD is enabled for ECCP1, disabling all of its clock sources
0 = PMD is disabled for ECCP1
bit 4 UART2MD: PMD UART2 Enable/Disable bit
1 = PMD is enabled for UART2, disabling all of its clock sources
0 = PMD is disabled for UART2
bit 3 UART1MD: PMD UART1 Enable/Disable bit
1 = PMD is enabled for UART1, disabling all of its clock sources
0 = PMD is disabled for UART1
bit 2 SSP2MD: PMD MSSP2 Enable/Disable bit
1 = PMD is enabled for MSSP2, disabling all of its clock sources
0 = PMD is disabled for MSSP2
bit 1 SSP1MD: PMD MSSP1 Enable/Disable bit
1 = PMD is enabled for MSSP1, disabling all of its clock sources
0 = PMD is disabled for MSSP1
bit 0 ADCMD: PMD Analog/Digital Converter PMD Enable/Disable bit
1 = PMD is enabled for the Analog/Digital Converter, disabling all of its clock sources
0 = PMD is disabled for the Analog/Digital Converter
Note 1: Unimplemented on devices with a program memory of 32 Kbytes (PIC18FX5K22).
2: RTCCMD can only be set to ‘1’ after an EECON2 unlock sequence. Refer to Section 18.0 “Real-Time
Clock and Calendar (RTCC)” for the unlock sequence (Example 18-1).
3: Unimplemented on devices with 64 pins (PIC18F6XK22).