Datasheet

PIC18F87K22 FAMILY
DS39960B-page 410 Preliminary  2010 Microchip Technology Inc.
REGISTER 28-8: CONFIG5L: CONFIGURATION REGISTER 5 LOW (BYTE ADDRESS 300008h)
R/C-1 R/C-1 R/C-1 R/C-1 R/C-1 R/C-1 R/C-1 R/C-1
CP7
(1)
CP6
(1)
CP5
(1)
CP5
(1)
CP3 CP2 CP1 CP0
bit 7 bit 0
Legend: C = Clearable bit
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 7
CP7: Code Protection bit
(1)
1 = Block 7, not code-protected
(2)
0 = Block 7, code-protected
(2)
bit 6 CP6: Code Protection bit
(1)
1 = Block 6, not code-protected
(2)
0 = Block 6, code-protected
(2)
bit 5 CP5: Code Protection bit
(1)
1 = Block 5, not code-protected
(2)
0 = Block 5, code-protected
(2)
bit 4 CP4: Code Protection bit
(1)
1 = Block 4, not code-protected
(2)
0 = Block 4, code-protected
(2)
bit 3 CP3: Code Protection bit
1 = Block 3, not code-protected
(2)
0 = Block 3, code-protected
(2)
bit 2 CP2: Code Protection bit
1 = Block 2, not code-protected
(2)
0 = Block 2, code-protected
(2)
bit 1
CP1: Code Protection bit
1 = Block 1, not code-protected
(2)
0 = Block 1, code-protected
(2)
bit 0
CP0: Code Protection bit
1 = Block 0, not code-protected
(2)
0 = Block 0, code-protected
(2)
Note 1: This bit is available only on PIC18F67K22 and PIC18F87K22.
2: For the memory size of the blocks, see Figure 28-6.