Datasheet

PIC18F66K80 FAMILY
DS39977C-page 618 Preliminary  2011 Microchip Technology Inc.
PORTA
Associated Registers ................................................183
LATA Register........................................................... 181
PORTA Register ....................................................... 181
TRISA Register .........................................................181
PORTB
Associated Registers ................................................186
LATB Register........................................................... 184
PORTB Register ....................................................... 184
RB7:RB4 Interrupt-on-Change Flag (RBIF Bit) ......... 184
TRISB Register .........................................................184
PORTC
Associated Registers ................................................189
LATC Register ..........................................................187
PORTC Register ....................................................... 187
RC3/REFO/SCL/SCK Pin ......................................... 310
TRISC Register......................................................... 187
PORTD
Associated Registers ................................................192
LATD Register ..........................................................190
PORTD Register ....................................................... 190
TRISD Register......................................................... 190
PORTE
Associated Registers ................................................194
LATE Register........................................................... 193
PORTE Register ....................................................... 193
RE0/AN5/RD
Pin....................................................... 198
RE1/AN6/C1OUT/WR
Pin......................................... 198
RE2/AN7/C2OUT/CS
Pin.......................................... 198
TRISE Register .........................................................193
PORTF
Associated Registers ................................................195
LATF Register........................................................... 195
PORTF Register ....................................................... 195
TRISF Register ......................................................... 195
PORTG
Associated Registers ................................................197
LATG Register ..........................................................196
PORTG Register.......................................................196
TRISG Register.........................................................196
Power-Managed Modes ...................................................... 67
and EUSART Operation............................................ 343
and PWM Operation ................................................. 291
and SPI Operation .................................................... 301
Clock Transitions and Status Indicators...................... 68
Entering....................................................................... 67
Exiting Idle and Sleep Modes ..................................... 78
by Interrupt.......................................................... 78
by Reset.............................................................. 78
by WDT Time-out................................................78
Without a Start-up Delay..................................... 78
Idle Modes .................................................................. 72
PRI_IDLE............................................................ 73
RC_IDLE............................................................. 74
SEC_IDLE........................................................... 73
Multiple Sleep Commands .......................................... 68
Run Modes.................................................................. 68
PRI_RUN ............................................................ 68
RC_RUN.............................................................69
SEC_RUN...........................................................68
Selecting ..................................................................... 67
Sleep Mode................................................................. 72
OSC1 and OSC2 Pin States ............................... 65
Summary (table) .........................................................67
Power-on Reset (POR)....................................................... 83
Oscillator Start-up Timer (OST).................................. 86
Power-up Timer (PWRT) ............................................ 85
Time-out Sequence .................................................... 86
Power-up Delays ................................................................ 65
Power-up Timer (PWRT) .............................................. 65, 85
Prescaler, Capture............................................................ 264
Prescaler, Timer0 ............................................................. 213
Prescaler, Timer2 ............................................................. 269
PRI_IDLE Mode.................................................................. 73
PRI_RUN Mode .................................................................. 68
Program Counter .............................................................. 107
PCL, PCH and PCU Registers ................................. 107
PCLATH and PCLATU Registers ............................. 107
Program Memory
Code Protection ........................................................ 484
Extended Instruction Set .......................................... 131
Hard Memory Vectors............................................... 106
Instructions ............................................................... 111
Two-Word ......................................................... 111
Interrupt Vector......................................................... 106
Look-up Tables ......................................................... 109
Memory Maps........................................................... 105
Hard Vectors and Configuration Words............ 106
Reset Vector............................................................. 106
Program Verification and Code Protection ....................... 483
Associated Registers................................................ 484
Programming, Device Instructions.................................... 487
PSP.
See Parallel Slave Port.
Pulse-Width Modulation.
See PWM (CCP Module).
PUSH................................................................................ 516
PUSH and POP Instructions............................................. 108
PUSHL.............................................................................. 532
PWM (CCP Module)
Associated Registers................................................ 270
Duty Cycle ................................................................ 269
Example Frequencies/Resolutions ........................... 269
Period ....................................................................... 268
Setup for PWM Operation......................................... 269
TMR2 to PR2 Match ................................................. 268
PWM (ECCP Module)
Effects of a Reset ..................................................... 291
Operation in Power-Managed Modes....................... 291
Operation with Fail-Safe Clock Monitor .................... 291
Pulse Steering Mode ................................................ 288
Steering Synchronization.......................................... 290
PWM Mode.
See Enhanced Capture/Compare/PWM ...... 277
Q
Q Clock ............................................................................. 269
R
RAM. See Data Memory.
RC_IDLE Mode................................................................... 74
RC_RUN Mode................................................................... 69
RCALL .............................................................................. 517
RCON Register
Bit Status During Initialization..................................... 89
Reader Response............................................................. 624
Receiver Warning ............................................................. 459
Reference Clock Output ..................................................... 63
Register File...................................................................... 114
Register File Summary ............................................. 117–126