Datasheet

 2011 Microchip Technology Inc. Preliminary DS39977C-page 611
PIC18F66K80 FAMILY
INDEX
A
A/D .................................................................................... 363
A/D Converter Interrupt, Configuring ........................ 371
Acquisition Requirements ......................................... 372
ADRESH Register..................................................... 369
Analog Port Pins, Configuring................................... 373
Associated Registers ................................................ 376
Automatic Acquisition Time....................................... 373
Configuring the Module............................................. 371
Conversion Clock (T
AD) ............................................ 373
Conversion Requirements ........................................ 588
Conversion Status (GO/DONE
Bit)........................... 369
Conversions.............................................................. 374
Converter Characteristics ......................................... 587
Differential Converter................................................ 363
Operation in Power-Managed Modes ....................... 375
Use of the Special Event Triggers ............................ 375
Absolute Maximum Ratings .............................................. 541
AC (Timing) Characteristics .............................................. 568
Load Conditions for Device
Timing Specifications........................................ 569
Parameter Symbology .............................................. 568
Temperature and Voltage Specifications .................. 569
Timing Conditions ..................................................... 569
ACKSTAT ......................................................................... 328
ACKSTAT Status Flag ...................................................... 328
ADCON0 Register
GO/DONE
Bit............................................................ 369
ADDFSR ........................................................................... 530
ADDLW ............................................................................. 493
ADDULNK......................................................................... 530
ADDWF............................................................................. 493
ADDWFC .......................................................................... 494
ADRESL Register ............................................................. 369
Analog-to-Digital Converter.
See A/D.
ANDLW ............................................................................. 494
ANDWF............................................................................. 495
Assembler
MPASM Assembler................................................... 538
Auto-Wake-up on Sync Break Character.......................... 354
B
Baud Rate Generator........................................................ 324
BC ..................................................................................... 495
BCF................................................................................... 496
BF ..................................................................................... 328
BF Status Flag .................................................................. 328
Bit Timing Configuration Registers
BRGCON1 ................................................................ 456
BRGCON2 ................................................................ 456
BRGCON3 ................................................................ 456
Block Diagrams
A/D............................................................................ 370
Analog Input Model ................................................... 371
Baud Rate Generator................................................ 324
CAN Buffers and Protocol Engine............................. 396
Capture Mode Operation .................................. 263, 275
Comparator Analog Input Model ............................... 380
Comparator Configurations....................................... 382
Comparator Module .................................................. 377
Comparator Voltage Reference ................................ 386
Comparator Voltage Reference Output Buffer.......... 387
Compare Mode Operation ................................ 266, 276
Connections for On-Chip Voltage Regulator ............ 478
Crystal/Ceramic Resonator Operation
(HS, HSPLL........................................................ 60
CTMU ....................................................................... 241
CTMU Current Source Calibration Circuit ................ 247
CTMU Temperature Measurement Circuit ............... 255
CTMU Typical Connections and Internal
Configuration for Pulse Delay Generation........ 256
CTMU Typical Connections and Internal
Configuration for Time Measurement ............... 254
Data Signal Modulator .............................................. 202
Device Clock............................................................... 54
Differential Channel Measurement ........................... 363
EUSART Receive ..................................................... 352
EUSART Transmit.................................................... 349
External Components for the SOSC Oscillator......... 220
External Power-on Reset Circuit
(Slow V
DD Power-up) ......................................... 83
Fail-Safe Clock Monitor (FSCM)............................... 481
Full-Bridge Application.............................................. 281
Generic I/O Port Operation....................................... 177
Half-Bridge Applications ................................... 280, 287
High/Low-Voltage Detect with External Input ........... 390
Interrupt Logic........................................................... 154
INTIO1 Oscillator Mode .............................................. 62
INTIO2 Oscillator Mode .............................................. 62
MSSP (I
2
C Master Mode)......................................... 322
MSSP (I
2
C Mode)..................................................... 302
MSSP (SPI Mode) .................................................... 293
On-Chip Reset Circuit................................................. 81
PIC18F2XK80............................................................. 17
PIC18F4XK80............................................................. 18
PIC18F6XK80............................................................. 19
PLL ............................................................................. 61
PORTD and PORTE (Parallel Slave Port)................ 198
PWM (Enhanced Mode) ........................................... 277
PWM Operation (Simplified) ..................................... 268
RC Oscillator Mode .................................................... 59
RCIO Oscillator Mode................................................. 59
Reads from Flash Program Memory ........................ 139
Simplified Steering.................................................... 290
Single Channel Measurement .................................. 363
Single Comparator.................................................... 380
Table Read Operation .............................................. 135
Table Write Operation .............................................. 136
Table Writes to Flash Program Memory ................... 141
Timer0 in 16-Bit Mode .............................................. 212
Timer0 in 8-Bit Mode ................................................ 212
Timer1 ...................................................................... 219
Timer2 ...................................................................... 228
Timer3 ...................................................................... 232
Timer4 ...................................................................... 240
Transmit Buffers ....................................................... 446
Ultra Low-Power Wake-up Initialization...................... 79
Using Open-Drain Output ......................................... 179
Watchdog Timer ....................................................... 476
BN..................................................................................... 496
BNC .................................................................................. 497
BNN .................................................................................. 497
BNOV ............................................................................... 498
BNZ .................................................................................. 498
BOR.
See Brown-out Reset.
BOV .................................................................................. 501