Datasheet

 2011 Microchip Technology Inc. Preliminary DS39977C-page 197
PIC18F66K80 FAMILY
TABLE 11-14: SUMMARY OF REGISTERS ASSOCIATED WITH PORTG
RG4/T0CKI RG4 0 O DIG LATG<4> data output.
1 I ST PORTG<4> data input.
T0CKI
(1)
x I ST Timer0 clock input.
Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
PORTG — — — RG4 RG3 RG2 RG1 RG0
TRISG
— — — TRISG4 TRISG3 TRISG2 TRISG1 TRISG0
PADCFG1
RDPU REPU RFPU
(1)
RGPU
(1)
— — — CTMUDS
Legend: — = unimplemented, read as ‘0’. Shaded cells are not used by PORTG.
Note 1: Unimplemented on 28-pin devices. Read as ‘0’.
TABLE 11-13: PORTG FUNCTIONS (CONTINUED)
Pin Name Function
TRIS
Setting
I/O I/O Type Description
Legend: O = Output, I = Input, ANA = Analog Signal, DIG = CMOS Output, ST = Schmitt Trigger Buffer Input,
x = Don’t care (TRIS bit does not affect port direction or is overridden for this option)
Note 1: Alternate pin assignment for T0CKI on 64-pin devices when the T0CKMX Configuration bit is cleared.
2: Default pin assignment for T3CKI on 64-pin devices when the T3CKMX Configuration bit is set.