Datasheet

 2009-2018 Microchip Technology Inc. DS30009960F-page 281
PIC18F87K22 FAMILY
TABLE 21-2: REGISTERS ASSOCIATED WITH SPI OPERATION
Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
INTCON GIE/GIEH PEIE/GIEL TMR0IE INT0IE RBIE TMR0IF INT0IF RBIF
PIR2 OSCFIF — SSP2IF BCL2IF BCL1IF HLVDIF TMR3IF TMR3GIF
PIE2
OSCFIE — SSP2IE BCL2IE BCL1IE HLVDIE TMR3IE TMR3GIE
IPR2 OSCFIP — SSP2IP BCL2IP BCL1IP HLVDIP TMR3IP TMR3GIP
PIR3 TMR5GIF
— RC2IF TX2IF CTMUIF CCP2IF CCP1IF RTCCIF
PIE3 TMR5GIE
— RC2IE TX2IE CTMUIE CCP2IE CCP1IE RTCCIE
IPR3 TMR5GIP — RC2IP TX2IP CTMUIP CCP2IP CCP1IP RTCCIP
TRISC
TRISC7 TRISC6 TRISC5 TRISC4 TRISC3 TRISC2 TRISC1 TRISC0
TRISD TRISD7 TRISD6 TRISD5 TRISD4
TRISD3 TRISD2 TRISD1 TRISD0
TRISF TRISF7 TRISF6 TRISF5 TRISF4 TRISF3 TRISF2 TRISF1 —
SSP1BUF MSSP1 Receive Buffer/Transmit Register
SSP1CON1 WCOL SSPOV SSPEN CKP SSPM3 SSPM2 SSPM1 SSPM0
SSP1CON2 GCEN ACKSTAT ACKDT ACKEN RCEN PEN RSEN SEN
SSP1STAT SMP CKE
D/A P S R/W UA BF
SSP2CON1 WCOL SSPOV SSPEN CKP SSPM3 SSPM2 SSPM1 SSPM0
SSP2CON2 GCEN ACKSTAT ACKDT ACKEN RCEN PEN RSEN SEN
SSP2STAT SMP CKE
D/A P S R/W UA BF
SSP2BUF MSSP2 Receive Buffer/Transmit Register
ODCON1 SSP1OD
CCP2OD CCP1OD — — — — SSP2OD
PMD0
CCP3MD CCP2MD CCP1MD UART2MD UART1MD SSP2MD SSP1MD ADCMD
Legend: Shaded cells are not used by the MSSP module in SPI mode.