Datasheet
2009-2018 Microchip Technology Inc. DS30009960F-page 253
PIC18F87K22 FAMILY
20.2 Capture Mode
In Capture mode, the CCPRxH:CCPRxL register pair
captures the 16-bit value of the TMR1 or TMR3
registers when an event occurs on the corresponding
ECCPx pin. An event is defined as one of the following:
• Every falling edge
• Every rising edge
• Every fourth rising edge
•Every 16
th
rising edge
The event is selected by the mode select bits,
CCPxM<3:0> (CCPxCON<3:0>). When a capture is
made, the interrupt request flag bit, CCPxIF, is set (see
Table 20-2). The flag must be cleared by software. If
another capture occurs before the value in the
CCPRxH/L register is read, the old captured value is
overwritten by the new captured value.
20.2.1 ECCP PIN CONFIGURATION
In Capture mode, the appropriate ECCPx pin should be
configured as an input by setting the corresponding
TRIS direction bit.
20.2.2 TIMER1/2/3/4/6/8/10/12 MODE
SELECTION
The timers that are to be used with the capture feature
(Timer1 2, 3, 4, 6, 8, 10 or 12) must be running in Timer
mode or Synchronized Counter mode. In
Asynchronous Counter mode, the capture operation
may not work. The timer to be used with each ECCP
module is selected in the CCPTMRS0 register
(Register 20-2).
20.2.3 SOFTWARE INTERRUPT
When the Capture mode is changed, a false capture
interrupt may be generated. The user should keep the
CCPxIE interrupt enable bit clear to avoid false interrupts.
The interrupt flag bit, CCPxIF, should also be cleared
following any such change in operating mode.
20.2.4 ECCP PRESCALER
There are four prescaler settings in Capture mode; they
are specified as part of the operating mode selected by
the mode select bits (CCPxM<3:0>). Whenever the
ECCP module is turned off, or Capture mode is dis-
abled, the prescaler counter is cleared. This means
that any Reset will clear the prescaler counter.
Switching from one capture prescaler to another may
generate an interrupt. Also, the prescaler counter will
not be cleared; therefore, the first capture may be from
a non-zero prescaler. Example 20-1 provides the
recommended method for switching between capture
prescalers. This example also clears the prescaler
counter and will not generate the “false” interrupt.
EXAMPLE 20-1: CHANGING BETWEEN
CAPTURE PRESCALERS
TABLE 20-2: ECCP1/2/3 INTERRUPT FLAG
BITS
ECCP Module Flag Bit
1 PIR3<1>
2 PIR3<2>
3 PIR4<0>
Note: If the ECCPx pin is configured as an out-
put, a write to the port can cause a capture
condition.
CLRF CCP1CON ; Turn ECCP module off
MOVLW NEW_CAPT_PS ; Load WREG with the
; new prescaler mode
; value and ECCP ON
MOVWF CCP1CON ; Load CCP1CON with
; this value