Datasheet

PIC18F2XK20/4XK20
DS40001303H-page 144  2010-2015 Microchip Technology Inc.
TABLE 11-7: REGISTERS ASSOCIATED WITH PWM AND TIMER2
Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Reset
Values
on page
INTCON GIE/GIEH PEIE/GIEL TMR0IE INT0IE RBIE TMR0IF INT0IF RBIF 56
RCON IPEN
SBOREN — RI TO PD POR BOR 55
PIR1 PSPIF
(1)
ADIF RCIF TXIF SSPIF CCP1IF TMR2IF TMR1IF 59
PIE1 PSPIE
(1)
ADIE RCIE TXIE SSPIE CCP1IE TMR2IE TMR1IE 59
IPR1
PSPIP
(1)
ADIP RCIP TXIP SSPIP CCP1IP TMR2IP TMR1IP 59
TRISB PORTB Data Direction Control Register 59
TRISC PORTC Data Direction Control Register 59
TMR2 Timer2 Register 57
PR2 Timer2 Period Register 57
T2CON
— T2OUTPS3 T2OUTPS2 T2OUTPS1 T2OUTPS0 TMR2ON T2CKPS1 T2CKPS0 57
CCPR1L Capture/Compare/PWM Register 1, Low Byte 58
CCPR1H Capture/Compare/PWM Register 1, High Byte 58
CCP1CON
P1M1 P1M0 DC1B1 DC1B0 CCP1M3 CCP1M2 CCP1M1 CCP1M0 58
CCPR2L Capture/Compare/PWM Register 2, Low Byte 58
CCPR2H Capture/Compare/PWM Register 2, High Byte 58
CCP2CON
— — DC2B1 DC2B0 CCP2M3 CCP2M2 CCP2M1 CCP2M0 58
ECCP1AS ECCPASE ECCPAS2 ECCPAS1 ECCPAS0 PSSAC1 PSSAC0
PSSBD1 PSSBD0 58
PWM1CON PRSEN PDC6 PDC5 PDC4 PDC3 PDC2 PDC PDC0 58
Legend: — = unimplemented, read as ‘0’. Shaded cells are not used by PWM or Timer2.
Note 1: Not implemented on PIC18F2XK20 devices.