Datasheet

 2004 Microchip Technology Inc. Preliminary DS39637A-page 109
PIC18F2480/2580/4480/4580
TABLE 7-1: REGISTERS ASSOCIATED WITH DATA EEPROM MEMORY
Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Reset
Values
on page
INTCON GIE/GIEH PEIE/GIEL TMR0IE INT0IE RBIE TMR0IF INT0IF RBIF 49
EEADR EEPROM Address Register 51
EEDATA EEPROM Data Register 51
EECON2 EEPROM Control Register 2 (not a physical register) 51
EECON1 EEPGD CFGS
— FREE WRERR WREN WR RD 51
IPR2 OSCFIP CMIP
(1)
— EEIP BCLIP HLVDIP TMR3IP ECCP1IP
(1)
51
PIR2 OSCFIF CMIF
(1)
— EEIF BCLIF HLVDIF TMR3IF ECCP1IF
(1)
51
PIE2 OSCFIE CMIE
(1)
— EEIE BCLIE HLVDIE TMR3IE ECCP1IE
(1)
52
Legend: — = unimplemented, read as ‘0’. Shaded cells are not used during Flash/EEPROM access.
Note 1: These bits are available in PIC18F4X80 devices and reserved in PIC18F2X80 devices.