Datasheet

2010-2016 Microchip Technology Inc. DS40001412G-page 355
PIC18(L)F2X/4XK22
24.3.1 CONTROL REGISTER
Register 24-14 shows the WDTCON register. This is a
readable and writable register which contains a control
bit that allows software to control the WDT when the
SWDTEN configuration bits select the software control
mode.
24.4 Register Definitions: WDT Control
TABLE 24-4: CONFIGURATION REGISTERS ASSOCIATED WITH WATCHDOG TIMER
REGISTER 24-14: WDTCON: WATCHDOG TIMER CONTROL REGISTER
U-0 U-0 U-0 U-0 U-0 U-0 U-0 R/W-0
—SWDTEN
(1)
bit 7 bit 0
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 7-1 Unimplemented: Read as ‘0
bit 0 SWDTEN: Software Enable or Disable the Watchdog Timer bit
(1)
1 = WDT is turned on
0 = WDT is turned off (Reset value)
Note 1: This bit has no effect if the Configuration bits WDTEN <1,0> are not equal to '10'.
TABLE 24-3: REGISTERS ASSOCIATED WITH WATCHDOG TIMER
Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Reset
Values
on Page
RCON
IPEN SBOREN RI TO PD POR BOR 56
WDTCON —SWDTEN355
Legend: — = unimplemented, read as 0’. Shaded bits are not used by the Watchdog Timer.
Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Reset
Values
on Page
CONFIG2H
WDPS<3:0> WDTEN<1:0> 347
Legend: — = unimplemented, read as 0’. Shaded bits are not used by the Watchdog Timer.