Datasheet

 2010-2016 Microchip Technology Inc. DS40001412G-page 179
PIC18(L)F2X/4XK22
IPR2 OSCFIP C1IP C2IP EEIP BCL1IP HLVDIP TMR3IP CCP2IP
122
IPR4
— — — — — CCP5IP CCP4IP CCP3IP
124
PIE1
— ADIE RC1IE TX1IE SSP1IE CCP1IE TMR2IE TMR1IE
117
PIE2
OSCFIE C1IE C2IE EEIE BCL1IE HLVDIE TMR3IE CCP2IE
118
PIE4
— — — — — CCP5IE CCP4IE CCP3IE
120
PIR1
— ADIF RC1IF TX1IF SSP1IF CCP1IF TMR2IF TMR1IF
112
PIR2
OSCFIF C1IF C2IF EEIF BCL1IF HLVDIF TMR3IF CCP2IF
113
PIR4
— — — — — CCP5IF CCP4IF CCP3IF
115
PMD0
UART2MD UART1MD TMR6MD TMR5MD TMR4MD TMR3MD TMR2MD TMR1MD
52
PMD1
MSSP2MD MSSP1MD — CCP5MD CCP4MD CCP3MD CCP2MD CCP1MD
53
T1CON TMR1CS<1:0> T1CKPS<1:0> T1SOSCEN T1SYNC
T1RD16 TMR1ON
166
T1GCON TMR1GE T1GPOL T1GTM T1GSPM T1GGO/D
ONE T1GVAL T1GSS<1:0>
167
T3CON TMR3CS<1:0> T3CKPS<1:0> T3SOSCEN T
3SYNC T3RD16 TMR3ON
166
T3GCON TMR3GE T3GPOL T3GTM T3GSPM T3GGO/D
ONE T3GVAL T3GSS<1:0>
167
T5CON TMR5CS<1:0> T5CKPS<1:0> T5SOSCEN T
5SYNC T5RD16 TMR5ON
166
T5GCON TMR5GE T5GPOL T5GTM T5GSPM T5GGO/D
ONE T5GVAL T5GSS<1:0>
167
TMR1H Holding Register for the Most Significant Byte of the 16-bit TMR1 Register
—
TMR1L Least Significant Byte of the 16-bit TMR1 Register
—
TMR3H Holding Register for the Most Significant Byte of the 16-bit TMR3 Register
—
TMR3L Least Significant Byte of the 16-bit TMR3 Register
—
TMR5H Holding Register for the Most Significant Byte of the 16-bit TMR5 Register
—
TMR5L Least Significant Byte of the 16-bit TMR5 Register
—
TRISA TRISA7 TRISA6 TRISA5 TRISA4 TRISA3 TRISA2 TRISA1 TRISA0
151
TRISB TRISB7 TRISB6 TRISB5 TRISB4 TRISB3 TRISB2 TRISB1 TRISB0
151
TRISC TRISC7 TRISC6 TRISC5 TRISC4 TRISC3 TRISC2 TRISC1 TRISC0
151
TRISD
(1)
TRISD7 TRISD6 TRISD5 TRISD4 TRISD3 TRISD2 TRISD1 TRISD0
151
TRISE
WPUE3 — — — — TRISE2
(1)
TRISE1
(1)
TRISE0
(1)
151
TABLE 14-5: REGISTERS ASSOCIATED WITH COMPARE (CONTINUED)
Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Register
on Page
Legend: — = Unimplemented location, read as ‘0’. Shaded bits are not used by Compare mode.
Note 1: These registers/bits are available on PIC18(L)F4XK22 devices.
TABLE 14-6: CONFIGURATION REGISTERS ASSOCIATED WITH COMPARE
Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Register
on Page
CONFIG3H
MCLRE — P2BMX T3CMX HFOFST CCP3MX PBADEN CCP2MX
348
Legend: — = Unimplemented location, read as ‘0’. Shaded bits are not used by Compare mode.