Datasheet

PIC18(L)F2X/4XK22
DS40001412G-page 146  2010-2016 Microchip Technology Inc.
TABLE 10-14: PORTE I/O SUMMARY
Pin Function
TRIS
Setting
ANSEL
Setting
Pin
Type
Buffer
Type
Description
RE0/P3A/CCP3/AN5 RE0 00O DIG LATE<0> data output; not affected by analog input.
10I ST PORTE<0> data input; disabled when analog input
enabled.
P3A
(1)
00O DIG Enhanced CCP3 PWM output.
CCP3
(1)
00
ODIG
Compare 3 output/PWM 3 output.
10
IST
Capture 3 input.
AN5 11I AN Analog input 5.
RE1/P3B/AN6 RE1 00O DIG LATE<1> data output; not affected by analog input.
10I ST PORTE<1> data input; disabled when analog input
enabled.
P3B
00O DIG Enhanced CCP3 PWM output.
AN6 11I AN Analog input 6.
RE2/CCP5/AN7 RE2 00O DIG LATE<2> data output; not affected by analog input.
10I ST PORTE<2> data input; disabled when analog input
enabled.
CCP5
00O DIG Compare 5 output/PWM 5 output.
10I ST Capture 5 input.
AN7 11I AN Analog input 7.
RE3/V
PP/MCLR
RE3 — — I ST PORTE<3> data input; enabled when Configuration bit
MCLRE = 0.
V
PP — — P AN Programming voltage input; always available
MCLR
——
I ST Active-low Master Clear (device Reset) input; enabled
when configuration bit MCLRE = 1.
Legend: AN = Analog input or output; TTL = TTL compatible input; HV = High Voltage; OD = Open Drain; XTAL = Crystal; CMOS =
CMOS compatible input or output; ST = Schmitt Trigger input with CMOS levels; I
2
C = Schmitt Trigger input with I
2
C.
Note 1: Alternate pin assignment for P3A/CCP3 when Configuration bit CCP3MX is clear.