Datasheet

PIC18(L)F2X/4XK22
DS40001412G-page 144  2010-2016 Microchip Technology Inc.
TABLE 10-13: CONFIGURATION REGISTERS ASSOCIATED WITH PORTD
TABLE 10-12: REGISTERS ASSOCIATED WITH PORTD
Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Register on
Page
ANSELD
(1)
ANSD7 ANSD6 ANSD5 ANSD4 ANSD3 ANSD2 ANSD1 ANSD0 150
BAUDCON2 ABDOVF RCIDL DTRXP CKTXP BRG16
—
WUE ABDEN 271
CCP1CON P1M<1:0>
DC1B<1:0> CCP1M<3:0> 198
CCP2CON P2M<1:0> DC2B<1:0> CCP2M<3:0> 198
CCP4CON
— —
DC4B<1:0> CCP4M<3:0> 198
LATD
(1)
LATD7 LATD6 LATD5 LATD4 LATD3 LATD2 LATD1 LATD0 152
PORTD
(1)
RD7 RD6 RD5 RD4 RD3 RD2 RD1 RD0 148
RCSTA2 SPEN RX9 SREN CREN ADDEN FERR OERR RX9D 270
SLRCON
(1)
— — —
SLRE SLRD SLRC SLRB SLRA 153
SSP2CON1 WCOL SSPOV SSPEN CKP SSPM<3:0> 253
TRISD
(1)
TRISD7 TRISD6 TRISD5 TRISD4 TRISD3 TRISD2 TRISD1 TRISD0 151
Legend: — = unimplemented locations, read as ‘0’. Shaded bits are not used for PORTD.
Note 1: Available on PIC18(L)F4XK22 devices.
Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Register
on Page
CONFIG3H
MCLRE — P2BMX T3CMX HFOFST CCP3MX PBADEN CCP2MX 348
Legend: — = unimplemented locations, read as ‘0’. Shaded bits are not used for PORTD.