Datasheet

 2010-2016 Microchip Technology Inc. DS40001412G-page 135
PIC18(L)F2X/4XK22
RB6/KBI2/PGC RB6 0 — O DIG LATB<6> data output; not affected by analog input.
1
—
I TTL PORTB<6> data input; disabled when analog input
enabled.
IOC2 1
— I TTL Interrupt-on-change pin.
TX2
(3)
1 — O DIG EUSART asynchronous transmit data output.
CK2
(3)
1 — O DIG EUSART synchronous serial clock output.
1
— I ST EUSART synchronous serial clock input.
PGC x
— I ST In-Circuit Debugger and ICSP
TM
programming clock input.
RB7/KBI3/PGD RB7 0
— O DIG LATB<7> data output; not affected by analog input.
1
—
I TTL PORTB<7> data input; disabled when analog input
enabled.
IOC3 1
— I TTL Interrupt-on-change pin.
RX2
(2), (3)
1 — I ST EUSART asynchronous receive data input.
DT2
(2), (3)
1 — O DIG EUSART synchronous serial data output.
1
— I ST EUSART synchronous serial data input.
PGD x
— O DIG In-Circuit Debugger and ICSP
TM
programming data output.
x
— I ST In-Circuit Debugger and ICSP
TM
programming data input.
TABLE 10-5: PORTB I/O SUMMARY (CONTINUED)
Pin Function
TRIS
Setting
ANSEL
Setting
Pin
Type
Buffer
Type
Description
Legend: AN = Analog input or output; TTL = TTL compatible input; HV = High Voltage; OD = Open Drain; XTAL = Crystal; CMOS =
CMOS compatible input or output; ST = Schmitt Trigger input with CMOS levels; I
2
C = Schmitt Trigger input with I
2
C.
Note 1: Default pin assignment for P2B, T3CKI, CCP3 and CCP2 when Configuration bits PB2MX, T3CMX, CCP3MX and
CCP2MX are set.
2: Alternate pin assignment for P2B, T3CKI, CCP3 and CCP2 when Configuration bits PB2MX, T3CMX, CCP3MX and
CCP2MX are clear.
3: Function on PORTD and PORTE for PIC18(L)F4XK22 devices.