Datasheet

2010-2016 Microchip Technology Inc. DS40001412G-page 451
PIC18(L)F2X/4XK22
FIGURE 27-23: A/D CONVERSION TIMING
TABLE 27-21: A/D CONVERTER CHARACTERISTICS:PIC18(L)F2X/4XK22
PIC18(L)F2X/4XK22
Standard Operating Conditions (unless otherwise stated)
Operating temperature Tested at +25°C
Param.
No.
Symbol Characteristic Min Typ Max Units Conditions
A01 N
R Resolution 10 bits VREF 3.0V
A03 E
IL
Integral Linearity Error ±0.5 ±1 LSb VREF = 3.0V
A04 E
DL
Differential Linearity Error ±0.5 ±1 LSb VREF 3.0V
A06 E
OFF
Offset Error ±0.7 ±2 LSb VREF 3.0V
A07 E
GN
Gain Error ±0.7 ±2 LSb VREF 3.0V
A08 E
TOTL
Total Error ±0.8 ±3 LSb VREF 3.0V
A20 V
REF
Reference Voltage Range
(V
REFHVREFL)
2—V
DD V
A21 V
REFH
Reference Voltage High VDD/2 VDD + 0.3 V
A22 VREFL
Reference Voltage Low VSS – 0.3V VDD/2 V
A25 VAIN
Analog Input Voltage VREFL —VREFH V
A30 ZAIN
Recommended Impedance of
Analog Voltage Source
—— 3k
Note: The A/D conversion result never decreases with an increase in the input voltage and has no missing codes.
131
130
132
BSF ADCON0, GO
Q4
A/D CLK
A/D DATA
ADRES
ADIF
GO
SAMPLE
OLD_DATA
SAMPLING STOPPED
DONE
NEW_DATA
(Note 2)
987 210
Note 1: If the A/D clock source is selected as RC, a time of TCY is added before the A/D clock starts.
This allows the SLEEP instruction to be executed.
2: This is a minimal RC delay (0.5T
AD), which also disconnects the holding capacitor from the analog input.
. . .
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