Datasheet
2010-2015 Microchip Technology Inc. DS40001303H-page 435
PIC18F2XK20/4XK20
APPENDIX A: REVISION HISTORY
Revision A (07/2006)
Original data sheet for PIC18F2XK20/4XK20 devices.
Revision B (03/2007)
Added part numbers PIC18F26K20 and
PIC18F46K20; Replaced Development Support
Section; Replaced Package Drawings.
Revision C (10/2007)
Revised Table 1, DIL Pins 34 and 35; Table 2, Pins 22
and 24; Table 1-2, Pins RB1 and RB3; Table 1-3, Pins
RB1 and RB3; Revised Sections 4.3, 4.4, 4.4.1, 4.4.2,
4.4.4; Revised Table 4-3, Note 2; Revised Table 6-1;
Revise Section 7.8: Revised Section 9.2; Revised
Examples 10-1 and 10-2; Revised Table 10-3, Pins
RB1 and RB3; Revised Sections 12.2 through 12.5;
Revised Register 16-1, bit 3-0; Revised Sections 16.1,
16.2, 16.4.4; Revised Register 16-2, bit 6-4; Revised
Table 16-2, Note 2; Revised Register 17-1, bit 6;
Revised Register 17-3; Revised Table 17-4; Revised
Register 19-1, added Note 2; Revised Register 20-3,
bits 5 and 4; Revised Register 23-4, bit 1; Revised
Register 23-12, bit 7-5; Revised Section 23.3; Revised
Section 24.1.1, instruction set descriptions; Revised
Section 26.0, voltage on MCLR
; Revised DC
Characteristics 26.2, 26.3, 26.4 26.5, 26.6, 26.7, 26.8
and 26.10; Revised Tables 26-1, 26-6, 26-7, 26-9, 26-
23.
Revision D (08/2008)
Update to Peripheral Highlights (EUSART module);
Deleted Section 2.2.6 (Oscillator Transitions); Revised
Sections 2.5.3, 2.9; Added Section 2.9.3 (Clock Switch
Timing); Deleted Section 2.10.4 (Clock Switching
Timing); Replaced BAUDCTL with BAUDCON
throughout; Revised Table 5-2 (PLUSW0, PLUSW1,
PLUSW2); Add Note 1 to Table 7-1 (EEADRH);
Revised Section 6.4.4 and Register 16-2 (FLT0 pin);
Revised Registers 17-2 and 17-5 (SSPEN); Revised
Register 17-6 (SEN); Added new paragraph after
Figure 18-2; Revised Note, Section 18.1.1; Deleted
Note, Section 18.1.2; Added new Note 2, Sections
18.1.2.9 and 18.1.2.10; Revised Note 1, Section
18.3.1; Added Section 18.3.2; Revised Section 18.3.5;
Added new Note 2, Sections 18.4.1.5, 18.4.1.10,
18.4.2.2, 18.4.2.4; Revised Register 21-1 (CVR);
Revised Note 1, Registers 23-6, 23.8, 23-10, Table 23-
3; Added new Figure 26-1; Revised 26.2, 26.6, 26.7
(Note 3), 26.8, 26.9, 26.10; Revised Tables 26-1, 26-2,
26-3, 26-6, 26-7, 26-8, 26-25; Updated Package
Drawings.
Revision E (04/2009)
Revised data sheet title; Revised Power-Managed
Modes, Peripheral Highlights, and Analog Features;
Revised 26.2, DC Char. table.
Revision F (09/2009)
Changed the values in the “Extreme Low-Power
Management with XLP” section; Added new Note 2 to
Pin Diagrams; Updated Electrical Characteristics
section; Added charts to the DS Characteristics
section; Removed Preliminary label; Added UQFN to
Pin Diagrams; Added the 28-pin UQFN to Table 3-1;
Updated MSSP section (Register 17-3; changing
SSPADD<6:0> to SSPADD<7:0>); Updated the
Development Support section deleting section 25.7;
Added the 28-Lead UQFN package marking diagrams
and the 28-Lead Plastic Ultra Thin Quad Flat, No Lead
Package (MV) - 4X4X0.5 mm Body (UQFN) package to
Packaging Information section; Other minor
corrections.
Revision G (01/2010)
Updated Figure 9-1; Reviewed Section 26 (Electrical
Characteristics); Added Figures 27-29, 27-30, 27-31
and 27-32 to Section 27 (DC and AC Characteristics
Graphs and Tables); Reviewed Product Identification
System section.
Revision H (06/2015)
Updated Figures 1 to 6 to new pin diagrams format;
Added pin diagram for 40-Pin UQFN; Updated pin
allocation Table 2 for 40-Pin UQFN; Revised pin
allocation tables; Updated Table 1-1 for 40-Pin UQFN;
Updated Table 1-3 for 40-Pin UQFN; Updated chapter
26.0 Electrical Specifications to new format; Updated
Table 26-18 in Electrical Specifications; Updated
Section 21.2, FVR Reference Module; Updated Figure
21-1; Updated Table B-1 in Appendix B for 40-Pin
UQFN; Updated Packaging Information chapter;
Revised Product Identification System section.