Datasheet

 2010-2015 Microchip Technology Inc. DS40001303H-page 221
PIC18F2XK20/4XK20
TABLE 17-4: SUMMARY OF REGISTERS ASSOCIATED WITH I
2
C™
Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Reset
Values on
page
IPR1
PSPIP
(1)
ADIP RCIP TXIP SSPIP CCP1IP TMR2IP TMR1IP 59
PIR1
PSPIF
(1)
ADIF RCIF TXIF SSPIF CCP1IF TMR2IF TMR1IF 59
PIE1
PSPIE
(1)
ADIE RCIE TXIE SSPIE CCP1IE TMR2IE TMR1IE 59
IPR2
OSCFIP C1IP C2IP EEIP BCLIP HLVDIP TMR3IP CCP2IP 59
PIR2
OSCFIF C1IF C2IF EEIF BCLIF HLVDIF TMR3IF CCP2IF 59
PIE2
OSCFIE C1IE C2IE EEIE BCLIE HLVDIE TMR3IE CCP2IE 59
SSPADD SSP Address Register in I
2
C™ Slave Mode. SSP Baud Rate Reload Register in I
2
C Master Mode. 57
SSPBUF SSP Receive Buffer/Transmit Register 57
SSPCON1 WCOL SSPOV SSPEN CKP SSPM3 SSPM2 SSPM1 SSPM0 57
SSPCON2 GCEN ACKSTAT ACKDT ACKEN RCEN PEN RSEN SEN 57
SSPMSK MSK7 MSK6 MSK5 MSK4 MSK3 MSK2 MSK1 MSK0 60
SSPSTAT SMP CKE D/A
PSR/WUA BF 57
TRISC
TRISC7 TRISC6 TRISC5 TRISC4 TRISC3 TRISC2 TRISC1 TRISC0 59
Legend: — = unimplemented, read as ‘0’. Shaded cells are not used by I
2
C.
Note 1: Not implemented on PIC18F2XK20 devices