Datasheet

PIC18(L)F2X/4XK22
DS41412C-page 50 Preliminary  2010 Microchip Technology Inc.
FIGURE 3-3: TRANSITION TIMING FROM RC_RUN MODE TO PRI_RUN MODE
Q1
Q3 Q4
OSC1
Peripheral
Program
PC
INTOSC
PLL Clock
Q1
PC + 4
Q2
Output
Q3
Q4
Q1
CPU Clock
PC + 2
Clock
Counter
Q2
Q2
Q3
Note1: TOST = 1024 TOSC; TPLL = 2 ms (approx). These intervals are not shown to scale.
2: Clock transition typically occurs within 2-4 T
OSC.
SCS<1:0> bits Changed
TPLL
(1)
12 n-1n
Clock
OSTS bit Set
Transition
(2)
Multiplexer
TOST
(1)