Datasheet

 2010 Microchip Technology Inc. Preliminary DS41412C-page 289
PIC18(L)F2X/4XK22
TABLE 16-9: REGISTERS ASSOCIATED WITH SYNCHRONOUS SLAVE TRANSMISSION
Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Register
on Page
BAUDCON1
ABDOVF RCIDL DTRXP CKTXP BRG16 — WUE ABDEN 274
BAUDCON2
ABDOVF RCIDL DTRXP CKTXP BRG16 — WUE ABDEN 274
INTCON GIE/GIEH PEIE/GIEL TMR0IE INT0IE RBIE TMR0IF INT0IF RBIF 115
IPR1
— ADIP RC1IP TX1IP SSP1IP CCP1IP TMR2IP TMR1IP 127
IPR3 SSP2IP BCL2IP RC2IP TX2IP CTMUIP TMR5GIP TMR3GIP TMR1GIP 129
PIE1
— ADIE RC1IE TX1IE SSP1IE CCP1IE TMR2IE TMR1IE 123
PIE3 SSP2IE BCL2IE RC2IE TX2IE CTMUIE TMR5GIE TMR3GIE TMR1GIE 125
PIR1
— ADIF RC1IF TX1IF SSP1IF CCP1IF TMR2IF TMR1IF 118
PIR3
SSP2IF BCL2IF RC2IF TX2IF CTMUIF TMR5GIF TMR3GIF TMR1GIF 120
PMD0 UART2MD UART1MD TMR6MD TMR5MD TMR4MD TMR3MD TMR2MD TMR1MD 56
RCSTA1 SPEN
RX9 SREN CREN ADDEN FERR OERR RX9D 273
RCSTA2 SPEN
RX9 SREN CREN ADDEN FERR OERR RX9D 273
SPBRG1 EUSART1 Baud Rate Generator, Low Byte
—
SPBRGH1 EUSART1 Baud Rate Generator, High Byte —
SPBRG2 EUSART2 Baud Rate Generator, Low Byte —
SPBRGH2 EUSART2 Baud Rate Generator, High Byte —
TRISB
(2)
TRISB7 TRISB6 TRISB5 TRISB4 TRISB3 TRISB2 TRISB1 TRISB0 154
TRISC TRISC7 TRISC6 TRISC5 TRISC4 TRISC3 TRISC2 TRISC1 TRISC0 154
TRISD
(1)
TRISD7 TRISD6 TRISD5 TRISD4 TRISD3 TRISD2 TRISD1 TRISD0 154
TXREG1 EUSART1 Transmit Register —
TXSTA1 CSRC TX9 TXEN SYNC SENDB BRGH TRMT TX9D 272
TXREG2 EUSART2 Transmit Register —
TXSTA2 CSRC TX9 TXEN SYNC SENDB BRGH TRMT TX9D 272
Legend: — = unimplemented locations, read as ‘0’. Shaded bits are not used for synchronous slave transmission.
Note 1: PIC18(L)F4XK22 devices.
2: PIC18(L)F2XK22 devices.