Datasheet

 2010 Microchip Technology Inc. Preliminary DS41412C-page 143
PIC18(L)F2X/4XK22
TABLE 10-8: PORTC I/O SUMMARY
Pin Name Function
TRIS
Setting
ANSEL
setting
Pin
Type
Buffer
Type
Description
RC0/P2B/T3CKI/T3G/
T1CKI/SOSCO
RC0 01O DIG LATC<0> data output; not affected by analog input.
10I ST PORTC<0> data input; disabled when analog input
enabled.
P2B
(2)
01O DIG Enhanced CCP2 PWM output 2.
T3CKI
(1)
10I ST Timer3 clock input.
T3G 10I ST Timer3 external clock gate input.
T1CKI 10I ST Timer1 clock input.
SOSCO x—O XTAL Secondary oscillator output.
RC1/P2A/CCP2/SOSCI RC1 01O DIG LATC<1> data output; not affected by analog input.
10I ST PORTC<1> data input; disabled when analog input
enabled.
P2A 01O DIG Enhanced CCP2 PWM output 1.
CCP2
(1)
01O DIG Compare 2 output/PWM 2 output.
10I ST Capture 2 input.
SOSCI x—I XTAL Secondary oscillator input.
RC2/CTPLS/P1A/
CCP1/T5CKI/AN14
RC2 01O DIG LATC<2> data output; not affected by analog input.
10I ST PORTC<2> data input; disabled when analog input
enabled.
CTPLS 01O DIG CTMU pulse generator output.
P1A 01O DIG Enhanced CCP1 PWM output 1.
CCP1 01O DIG Compare 1 output/PWM 1 output.
10I ST Capture 1 input.
T5CKI 10I ST Timer5 clock input.
AN14 11I AN Analog input 14.
RC3/SCK1/SCL1/AN15 RC3 01O DIG LATC<3> data output; not affected by analog input.
10I ST PORTC<3> data input; disabled when analog input
enabled.
SCK1 01O DIG MSSP1 SPI Clock output.
10I ST MSSP1 SPI Clock input.
SCL1 01ODIGMSSP1 I
2
C™ Clock output.
10I I2C MSSP1 I
2
C™ Clock input.
AN15 11I AN Analog input 15.
RC4/SDI1/SDA1/AN16 RC4 01O DIG LATC<4> data output; not affected by analog input.
10I ST PORTC<4> data input; disabled when analog input
enabled.
SDI1 10I ST MSSP1 SPI data input.
SDA1 00ODIGMSSP1 I
2
C™ data output.
10I I2C MSSP1 I
2
C™ data input.
AN16 11I AN Analog input 16.
Legend: AN = Analog input or output; TTL = TTL compatible input; HV = High Voltage; OD = Open Drain; XTAL = Crystal; CMOS =
CMOS compatible input or output; ST = Schmitt Trigger input with CMOS levels; I
2
C
TM
= Schmitt Trigger input with I
2
C.
Note 1: Default pin assignment for P2B, T3CKI, CCP3 and CCP2 when Configuration bits PB2MX, T3CMX, CCP3MX and
CCP2MX are set.
2: Alternate pin assignment for P2B, T3CKI, CCP3 and CCP2 when Configuration bits PB2MX, T3CMX, CCP3MX and
CCP2MX are clear.
3: Function on PORTD and PORTE for PIC18(L)F4XK22 devices.