Datasheet
2009-2016 Microchip Technology Inc. DS40001365F-page 219
PIC18(L)F1XK22
17.8 Additional Comparator Features
There are four additional comparator features:
• Simultaneous read of comparator outputs
• Internal reference selection
• Hysteresis selection
• Output Synchronization
17.8.1 SIMULTANEOUS COMPARATOR
OUTPUT READ
The MC1OUT and MC2OUT bits of the CM2CON1
register are mirror copies of both comparator outputs.
The ability to read both outputs simultaneously from a
single register eliminates the timing skew of reading
separate registers.
17.8.2 INTERNAL REFERENCE
SELECTION
There are two internal voltage references available to
the noninverting input of each comparator. One of
these is the Fixed Voltage Reference (FVR) and the
other is the variable Digital-to-Analog Converter
(CV
REF/DAC). The CxRSEL bit of the CM2CON
register determines which of these references is routed
to the Digital-to-Analog Converter output
(CV
REF/DAC). Further routing to the comparator is
accomplished by the CxR bit of the CMxCON0 register.
See 20.0 “Fixed Voltage Reference (FVR)” and
Figure 17-2 and Figure 17-3 for more detail.
17.8.3 COMPARATOR HYSTERESIS
The Comparator Cx have selectable hysteresis. The
hysteresis can be enabled by setting the CxHYS bit of
the CM2CON1 register. See Section 26.0 “Electrical
Specifications” for more details.
17.8.4 SYNCHRONIZING COMPARATOR
OUTPUT TO TIMER 1
The Comparator Cx output can be synchronized with
Timer1 by setting the CxSYNC bit of the CM2CON1
register. When enabled, the Cx output is latched on
the rising edge of the Timer1 source clock. If a
prescaler is used with Timer1, the comparator output
is latched after the prescaling function. To prevent a
race condition, the comparator output is latched on
the rising edge of the Timer1 clock source and Timer1
increments on the rising edge of its clock source. See
the Comparator Block Diagram (Figure 17-2 and
Figure 17-3) and the Timer1 Block Diagram
(Figure 17-2) for more information.
Note 1: Obtaining the status of C1OUT or
C2OUT by reading CM2CON1 does not
affect the comparator interrupt mismatch
registers.