Datasheet

 2009-2016 Microchip Technology Inc. DS40001365F-page 209
PIC18(L)F1XK22
TABLE 16-2: REGISTERS ASSOCIATED WITH A/D OPERATION
Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Reset
Values
on page
ADRESH A/D Result Register, High Byte 247
ADRESL A/D Result Register, Low Byte 247
ADCON0
— — CHS3 CHS2 CHS1 CHS0 GO/DONE ADON 247
ADCON1
— — — —
PVCFG1 PVCFG0 NVCFG1 NVCFG0
247
ADCON2 ADFM
— ACQT2 ACQT1 ACQT0 ADCS2 ADCS1 ADCS0 247
ANSEL ANS7 ANS6 ANS5 ANS4 ANS3 ANS2 ANS1 ANS0 248
ANSELH
— — — — ANS11 ANS10 ANS9 ANS8 248
INTCON GIE/GIEH PEIE/GIEL TMR0IE INT0IE RABIE TMR0IF INT0IF RABIF 245
IPR1
—
ADIP
RCIP TXIP SSPIP CCP1IP TMR2IP TMR1IP 248
PIE1
—
ADIE
RCIE TXIE SSPIE CCP1IE TMR2IE TMR1IE 248
PIR1
—
ADIF
RCIF TXIF SSPIF CCP1IF TMR2IF TMR1IF 248
TRISA
— —
TRISA5 TRISA4
—
(1)
TRISA2 TRISA1 TRISA0
248
TRISB
TRISB7 TRISB6 TRISB5 TRISB4
— — — —
248
TRISC
TRISC7 TRISC6
TRISC5 TRISC4 TRISC3 TRISC2 TRISC1 TRISC0
248
Legend: — = unimplemented, read as ‘0’. Shaded cells are not used for A/D conversion.
Note 1: Unimplemented, read as ‘1’.