Datasheet

 2001 Microchip Technology Inc. DS35007B-page 81
PIC16F84A
Power-on Reset (POR) ..........................................21, 24, 26
Oscillator Start-up Timer (OST) ........................... 21
, 26
PD
Bit................................................. 8, 24, 28, 32, 33
Power-up Timer (PWRT) ..................................... 21
, 26
Time-out Sequence..................................................... 28
Time-out Sequence on Power-up ........................ 27
, 28
TO
Bit...........................................8, 24, 28, 30, 32, 33
Prescaler.............................................................................19
Assignment (PSA Bit) .................................................19
Block Diagram.............................................................20
Rate Select (PS2:PS0 Bits) ........................................19
Switching Prescaler Assignment.................................20
Prescaler, Timer0
Assignment (PSA Bit) ...................................................9
Rate Select (PS2:PS0 Bits) ..........................................9
PRO MATE II Universal Device Programmer .....................45
Program Counter ................................................................ 11
PCL Register....................................................7
, 11, 25
PCLATH Register ............................................7
, 11, 25
Reset Conditions.........................................................24
Program Memory .................................................................. 5
General Purpose Registers........................................... 6
Interrupt Vector ...................................................... 5
, 29
RESET Vector...............................................................5
Special Function Registers ...................................... 6
, 7
Programming, Device Instructions......................................35
R
RAM. See Data Memory
Register File.......................................................................... 6
Register File Map..................................................................6
Registers
Configuration Word..................................................... 21
EECON1 (EEPROM Control)......................................13
INTCON ......................................................................10
OPTION ........................................................................ 9
STATUS........................................................................ 8
Reset............................................................................ 21
, 24
Block Diagram...................................................... 24
, 26
MCLR
Reset. See MCLR
Power-on Reset (POR). See Power-on Reset (POR)
Reset Conditions for All Registers .............................. 25
Reset Conditions for Program Counter....................... 24
Reset Conditions for STATUS Register......................24
WDT Reset.
See Watchdog Timer (WDT)
Revision History..................................................................75
RP1:RP0 (Bank Select) bits..................................................8
S
Saving W Register and STATUS in RAM ........................... 30
SLEEP ............................................................21
, 24, 29, 32
Software Simulator (MPLAB SIM)....................................... 44
Special Features of the CPU .............................................. 21
Special Function Registers .............................................. 6
, 7
Speed, Operating..............................................1
, 22, 23, 57
Stack...................................................................................11
STATUS Register ...............................................7
, 8, 25, 30
C Bit ..............................................................................8
DC Bit............................................................................8
PD
Bit................................................. 8, 24, 28, 32, 33
RESET Conditions...................................................... 24
RP0 Bit..........................................................................6
TO
Bit...........................................8, 24, 28, 30, 32, 33
Z Bit............................................................................... 8
T
Time-out (TO) Bit. See Power-on Reset (POR)
Timer0 ................................................................................ 19
Associated Registers.................................................. 20
Block Diagram ............................................................ 19
Clock Source Edge Select (T0SE Bit) .......................... 9
Clock Source Select (T0CS Bit) ................................... 9
Overflow Enable (T0IE Bit)...................................10
, 29
Overflow Flag (T0IF Bit) ................................ 10
, 20, 29
Overflow Interrupt.................................................20
, 29
Prescaler.
See Prescaler
RA4/T0CKI Pin, External Clock.................................. 19
TMR0 Register ................................................7
, 20, 25
Timing Conditions............................................................... 56
Timing Diagrams
CLKOUT and I/O ........................................................ 58
Diagrams and Specifications ...................................... 57
CLKOUT and I/O Requirements......................... 58
External Clock Requirements............................. 57
RESET, Watchdog Timer, Oscillator Start-up
Timer and Power-up
Timer Requirements................................... 59
Timer0 Clock Requirements............................... 60
External Clock ............................................................ 57
RESET, Watchdog Timer, Oscillator Start-up
Timer and Power-up Timer................................. 59
Time-out Sequence on Power-up.........................27
, 28
Timer0 Clock .............................................................. 60
Wake-up From SLEEP Through Interrupt .................. 32
Timing Parameter Symbology ............................................ 55
TO
bit.................................................................................... 8
W
W Register....................................................................25, 30
Wake-up from SLEEP...............................21
, 26, 28, 29, 32
Interrupts ..............................................................32
, 33
MCLR
Reset............................................................... 32
WDT Reset................................................................. 32
Watchdog Timer (WDT)................................................21
, 30
Block Diagram ............................................................ 31
Postscaler.
See Prescaler
Programming Considerations..................................... 31
RC Oscillator .............................................................. 30
Time-out Period.......................................................... 30
WDT Reset, Normal Operation................................... 24
WDT Reset, SLEEP .............................................24
, 32
WWW, On-Line Support ....................................................... 2
Z
Z (Zero) bit............................................................................ 8