Datasheet

PIC16F818/819
DS39598C-page 72 Preliminary  2002 Microchip Technology Inc.
REGISTER 10-1: SSPSTAT: SYNCHRONOUS SERIAL PORT STATUS REGISTER (ADDRESS 94h)
R/W-0 R/W-0 R-0 R-0 R-0 R-0 R-0 R-0
SMP CKE D/A
PSR/WUA BF
bit 7 bit 0
bit 7 SMP: SPI Data Input Sample Phase bit
SPI Master mode
:
1 = Input data sampled at end of data output time
0 = Input data sampled at middle of data output time (Microwire
®
)
SPI Slave mode
:
This bit must be cleared when SPI is used in Slave mode
I
2
C mode:
This bit must be maintained clear
bit 6 CKE: SPI Clock Edge Select bit
SPI mode, CKP = 0
:
1 = Data transmitted on rising edge of SCK (Microwire alternate)
0 = Data transmitted on falling edge of SCK
SPI mode, CKP = 1
:
1 = Data transmitted on falling edge of SCK (Microwire alternate)
0 = Data transmitted on rising edge of SCK
I
2
C mode:
This bit must be maintained clear
bit 5 D/A
: Data/Address bit (I
2
C mode only)
In
I
2
C Slave mode:
1 = Indicates that the last byte received was data
0 = Indicates that the last byte received was address
bit 4 P: STOP bit
(1)
(I
2
C mode only)
1 = Indicates that a STOP bit has been detected last
0 = STOP bit was not detected last
bit 3 S: START bit
(1)
(I
2
C mode only)
1 = Indicates that a START bit has been detected last (this bit is ‘0’ on RESET)
0 = START bit was not detected last
bit 2 R/W: Read/Write Information bit (I
2
C mode only)
Holds the R/W bit information following the last address match, and is only valid from address match
to the next START bit, STOP bit, or ACK bit
1 =Read
0 = Write
bit 1 UA: Update Address bit (10-bit I
2
C mode only)
1 = Indicates that the user needs to update the address in the SSPADD register
0 = Address does not need to be updated
bit 0 BF: Buffer Full Status bit
Receive (SPI and
I
2
C modes):
1 = Receive complete, SSPBUF is full
0 = Receive not complete, SSPBUF is empty
Transmit (In
I
2
C mode only):
1 = Transmit in progress, SSPBUF is full (8 bits)
0 = Transmit complete, SSPBUF is empty
Note 1: This bit is cleared when the SSP module is disabled (i.e., the SSPEN bit is cleared).
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
- n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown