Datasheet

2002 Microchip Technology Inc. Preliminary DS39598C-page 95
PIC16F818/819
FIGURE 12-3: TIME-OUT SEQUENCE ON POWER-UP (MCLR TIED TO VDD THROUGH
PULL-UP RESISTOR)
FIGURE 12-4: TIME-OUT SEQUENCE ON POWER-UP (MCLR
TIED TO VDD THROUGH
RC NETWORK): CASE 1
FIGURE 12-5: TIME-OUT SEQUENCE ON POWER-UP (MCLR
TIED TO VDD THROUGH
RC NETWORK): CASE 2
TPWRT
TOST
VDD
MCLR
INTERNAL POR
PWRT TIME-OUT
OST TIME-OUT
INTERNAL RESET
TPWRT
TOST
VDD
MCLR
INTERNAL POR
PWRT TIME-OUT
OST TIME-OUT
INTERNAL RESET
VDD
MCLR
INTERNAL POR
PWRT TIME-OUT
OST TIME-OUT
INTERNAL RESET
TPWRT
TOST